Lines Matching refs:isOne
950 if (!N1C || !N1C->isOne()) in combineShiftToAVG()
969 ConstOp->isOne()) { in combineShiftToAVG()
976 ConstOp->isOne()) { in combineShiftToAVG()
2005 if (DemandedBits.isOne()) in SimplifyDemandedBits()
2311 if (DemandedBits.isOne() && !TLO.LegalOps && !VT.isVector()) in SimplifyDemandedBits()
2797 if (Op.getOpcode() == ISD::SUB && DemandedBits.isOne() && in SimplifyDemandedBits()
2825 if (C && !C->isAllOnes() && !C->isOne() && in SimplifyDemandedBits()
3860 return CVal.isOne(); in isConstTrueVal()
3895 return N->isOne(); in isExtendedTrueVal()
3902 return (N->isOne() && !SExt) || (SExt && (N->getValueType(0) != MVT::i1)); in isExtendedTrueVal()
4473 if (N0.getOpcode() == ISD::SRL && (C1.isZero() || C1.isOne()) && in SimplifySetCC()
4723 } else if ((N1C->isZero() || N1C->isOne()) && in SimplifySetCC()
4731 bool TrueWhenTrue = (Cond == ISD::SETEQ) ^ (!N1C->isOne()); in SimplifySetCC()
4769 } else if (N1C->isOne()) { in SimplifySetCC()
6198 if (Divisor.isOne() || Divisor.isAllOnes()) { in BuildSDIV()
6372 if (Divisor.isOne()) { in BuildUDIV()
6611 bool TautologicalLane = D.isOne() || TautologicalInvertedLane; in prepareUREMEqFold()
6623 assert((!D.isOne() || (K == 0)) && "For divisor '1' we won't rotate."); in prepareUREMEqFold()
6630 AllDivisorsArePowerOfTwo &= D0.isOne(); in prepareUREMEqFold()
6639 assert((D0 * P).isOne() && "Multiplicative inverse basic check failed."); in prepareUREMEqFold()
6860 HadOneDivisor |= D.isOne(); in prepareSREMEqFold()
6861 AllDivisorsAreOnes &= D.isOne(); in prepareSREMEqFold()
6865 assert((!D.isOne() || (K == 0)) && "For divisor '1' we won't rotate."); in prepareSREMEqFold()
6876 AllDivisorsArePowerOfTwo &= D0.isOne(); in prepareSREMEqFold()
6885 assert((D0 * P).isOne() && "Multiplicative inverse basic check failed."); in prepareSREMEqFold()
6907 if (D.isOne()) { in prepareSREMEqFold()
7669 if (HalfMaxPlus1.urem(Divisor).isOne()) { in expandDIVREMByConstant()