Lines Matching refs:LH

7404                                     SDValue LH, SDValue RL, SDValue RH) const {  in expandMUL_LOHI()  argument
7424 assert((LL.getNode() && LH.getNode() && RL.getNode() && RH.getNode()) || in expandMUL_LOHI()
7425 (!LL.getNode() && !LH.getNode() && !RL.getNode() && !RH.getNode())); in expandMUL_LOHI()
7485 if (!LH.getNode() && !RH.getNode() && in expandMUL_LOHI()
7488 LH = DAG.getNode(ISD::SRL, dl, VT, LHS, Shift); in expandMUL_LOHI()
7489 LH = DAG.getNode(ISD::TRUNCATE, dl, HiLoVT, LH); in expandMUL_LOHI()
7494 if (!LH.getNode()) in expandMUL_LOHI()
7504 LH = DAG.getNode(ISD::MUL, dl, HiLoVT, LH, RL); in expandMUL_LOHI()
7506 Hi = DAG.getNode(ISD::ADD, dl, HiLoVT, Hi, LH); in expandMUL_LOHI()
7527 if (!MakeMUL_LOHI(LH, RL, Lo, Hi, false)) in expandMUL_LOHI()
7546 if (!MakeMUL_LOHI(LH, RH, Lo, Hi, Opcode == ISD::SMUL_LOHI)) in expandMUL_LOHI()
7561 Next = DAG.getSelectCC(dl, LH, Zero, NextSub, Next, ISD::SETLT); in expandMUL_LOHI()
7576 SDValue LL, SDValue LH, SDValue RL, in expandMUL() argument
7581 DAG, Kind, LL, LH, RL, RH); in expandMUL()
7614 SDValue LL, SDValue LH) const { in expandDIVREMByConstant()
7670 assert(!LL == !LH && "Expected both input halves or no input halves!"); in expandDIVREMByConstant()
7672 std::tie(LL, LH) = DAG.SplitScalar(N->getOperand(0), dl, HiLoVT, HiLoVT); in expandDIVREMByConstant()
7688 DAG.getNode(ISD::SHL, dl, HiLoVT, LH, in expandDIVREMByConstant()
7691 LH = DAG.getNode(ISD::SRL, dl, HiLoVT, LH, in expandDIVREMByConstant()
7700 Sum = DAG.getNode(ISD::UADDO, dl, VTList, LL, LH); in expandDIVREMByConstant()
7704 Sum = DAG.getNode(ISD::ADD, dl, HiLoVT, LL, LH); in expandDIVREMByConstant()
7730 SDValue Dividend = DAG.getNode(ISD::BUILD_PAIR, dl, VT, LL, LH); in expandDIVREMByConstant()