352     MVT RegisterVT;  in getCopyFromPartsVector()  local
359           NumIntermediates, RegisterVT);  in getCopyFromPartsVector()
363                                      NumIntermediates, RegisterVT);  in getCopyFromPartsVector()
368     assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");  in getCopyFromPartsVector()
369     assert(RegisterVT.getSizeInBits() ==  in getCopyFromPartsVector()
748   MVT RegisterVT;  in getCopyToPartsVector()  local
754         RegisterVT);  in getCopyToPartsVector()
758                                    NumIntermediates, RegisterVT);  in getCopyToPartsVector()
763   assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");  in getCopyToPartsVector()
852     MVT RegisterVT =  in RegsForValue()  local
858     RegVTs.push_back(RegisterVT);  in RegsForValue()
881     MVT RegisterVT = isABIMangled()  in getCopyFromRegs()  local
890         P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT);  in getCopyFromRegs()
892         P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT, *Glue);  in getCopyFromRegs()
902           !RegisterVT.isInteger())  in getCopyFromRegs()
910       unsigned RegSize = RegisterVT.getScalarSizeInBits();  in getCopyFromRegs()
918         Parts[i] = DAG.getConstant(0, dl, RegisterVT);  in getCopyFromRegs()
939                              RegisterVT, P, DAG.getValueType(FromVT));  in getCopyFromRegs()
943                                      RegisterVT, ValueVT, V, Chain, CallConv);  in getCopyFromRegs()
964     MVT RegisterVT = isABIMangled()  in getCopyToRegs()  local
969     if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT))  in getCopyToRegs()
973                    NumParts, RegisterVT, V, CallConv, ExtendKind);  in getCopyToRegs()
1049     MVT RegisterVT = RegVTs[Value];  in AddInlineAsmOperands()  local
1051                                            RegisterVT);  in AddInlineAsmOperands()
1055       Ops.push_back(DAG.getRegister(TheReg, RegisterVT));  in AddInlineAsmOperands()
1066     MVT RegisterVT = std::get<1>(CountAndVT);  in getRegsAndSizes()  local
1067     TypeSize RegisterSize = RegisterVT.getSizeInBits();  in getRegsAndSizes()
10296       MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT);  in LowerCallTo()  local
10298       unsigned RegisterVTByteSZ = RegisterVT.getSizeInBits() / 8;  in LowerCallTo()
10299       RetTys.append(NumRegs, RegisterVT);  in LowerCallTo()
10362       MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),  in LowerCallTo()  local
10369         MyFlags.VT = RegisterVT;  in LowerCallTo()
10646       MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),  in LowerCallTo()  local
10652           CLI.DAG, CLI.DL, &InVals[CurReg], NumRegs, RegisterVT, VT, nullptr,  in LowerCallTo()
10941     MVT RegisterVT = TLI->getRegisterType(*DAG.getContext(), ValueVTs[0]);  in LowerArguments()  local
10942     ISD::InputArg RetArg(Flags, RegisterVT, ValueVTs[0], true,  in LowerArguments()
11071       MVT RegisterVT = TLI->getRegisterTypeForCallingConv(  in LowerArguments()  local
11080             Flags, RegisterVT, VT, isArgValueUsed, ArgNo,  in LowerArguments()
11081             PartBase + i * RegisterVT.getStoreSize().getKnownMinValue());  in LowerArguments()