Lines Matching refs:VT
744 MVT VT = Node->getSimpleValueType(0); in Promote() local
745 MVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT); in Promote()
769 if ((VT.isFloatingPoint() && NVT.isFloatingPoint()) || in Promote()
770 (VT.isVector() && VT.getVectorElementType().isFloatingPoint() && in Promote()
772 Res = DAG.getNode(ISD::FP_ROUND, dl, VT, Res, in Promote()
775 Res = DAG.getNode(ISD::BITCAST, dl, VT, Res); in Promote()
785 MVT VT = Node->getOperand(IsStrict ? 1 : 0).getSimpleValueType(); in PromoteINT_TO_FP() local
786 MVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT); in PromoteINT_TO_FP()
787 assert(NVT.getVectorNumElements() == VT.getVectorNumElements() && in PromoteINT_TO_FP()
823 MVT VT = Node->getSimpleValueType(0); in PromoteFP_TO_INT() local
824 MVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT); in PromoteFP_TO_INT()
826 assert(NVT.getVectorNumElements() == VT.getVectorNumElements() && in PromoteFP_TO_INT()
859 DAG.getValueType(VT.getScalarType())); in PromoteFP_TO_INT()
860 Promoted = DAG.getNode(ISD::TRUNCATE, dl, VT, Promoted); in PromoteFP_TO_INT()
1153 EVT VT = Node->getValueType(0); in ExpandSELECT() local
1160 assert(VT.isVector() && !Mask.getValueType().isVector() in ExpandSELECT()
1171 if (TLI.getOperationAction(ISD::AND, VT) == TargetLowering::Expand || in ExpandSELECT()
1172 TLI.getOperationAction(ISD::XOR, VT) == TargetLowering::Expand || in ExpandSELECT()
1173 TLI.getOperationAction(ISD::OR, VT) == TargetLowering::Expand || in ExpandSELECT()
1174 TLI.getOperationAction(VT.isFixedLengthVector() ? ISD::BUILD_VECTOR in ExpandSELECT()
1176 VT) == TargetLowering::Expand) in ExpandSELECT()
1180 EVT MaskTy = VT.changeVectorElementTypeToInteger(); in ExpandSELECT()
1206 EVT VT = Node->getValueType(0); in ExpandSEXTINREG() local
1209 if (TLI.getOperationAction(ISD::SRA, VT) == TargetLowering::Expand || in ExpandSEXTINREG()
1210 TLI.getOperationAction(ISD::SHL, VT) == TargetLowering::Expand) in ExpandSEXTINREG()
1216 unsigned BW = VT.getScalarSizeInBits(); in ExpandSEXTINREG()
1218 SDValue ShiftSz = DAG.getConstant(BW - OrigBW, DL, VT); in ExpandSEXTINREG()
1220 SDValue Op = DAG.getNode(ISD::SHL, DL, VT, Node->getOperand(0), ShiftSz); in ExpandSEXTINREG()
1221 return DAG.getNode(ISD::SRA, DL, VT, Op, ShiftSz); in ExpandSEXTINREG()
1228 EVT VT = Node->getValueType(0); in ExpandANY_EXTEND_VECTOR_INREG() local
1229 int NumElements = VT.getVectorNumElements(); in ExpandANY_EXTEND_VECTOR_INREG()
1236 if (SrcVT.bitsLE(VT)) { in ExpandANY_EXTEND_VECTOR_INREG()
1237 assert((VT.getSizeInBits() % SrcVT.getScalarSizeInBits()) == 0 && in ExpandANY_EXTEND_VECTOR_INREG()
1239 NumSrcElements = VT.getSizeInBits() / SrcVT.getScalarSizeInBits(); in ExpandANY_EXTEND_VECTOR_INREG()
1257 ISD::BITCAST, DL, VT, in ExpandANY_EXTEND_VECTOR_INREG()
1263 EVT VT = Node->getValueType(0); in ExpandSIGN_EXTEND_VECTOR_INREG() local
1269 SDValue Op = DAG.getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Src); in ExpandSIGN_EXTEND_VECTOR_INREG()
1274 unsigned EltWidth = VT.getScalarSizeInBits(); in ExpandSIGN_EXTEND_VECTOR_INREG()
1276 SDValue ShiftAmount = DAG.getConstant(EltWidth - SrcEltWidth, DL, VT); in ExpandSIGN_EXTEND_VECTOR_INREG()
1277 return DAG.getNode(ISD::SRA, DL, VT, in ExpandSIGN_EXTEND_VECTOR_INREG()
1278 DAG.getNode(ISD::SHL, DL, VT, Op, ShiftAmount), in ExpandSIGN_EXTEND_VECTOR_INREG()
1287 EVT VT = Node->getValueType(0); in ExpandZERO_EXTEND_VECTOR_INREG() local
1288 int NumElements = VT.getVectorNumElements(); in ExpandZERO_EXTEND_VECTOR_INREG()
1295 if (SrcVT.bitsLE(VT)) { in ExpandZERO_EXTEND_VECTOR_INREG()
1296 assert((VT.getSizeInBits() % SrcVT.getScalarSizeInBits()) == 0 && in ExpandZERO_EXTEND_VECTOR_INREG()
1298 NumSrcElements = VT.getSizeInBits() / SrcVT.getScalarSizeInBits(); in ExpandZERO_EXTEND_VECTOR_INREG()
1317 return DAG.getNode(ISD::BITCAST, DL, VT, in ExpandZERO_EXTEND_VECTOR_INREG()
1321 static void createBSWAPShuffleMask(EVT VT, SmallVectorImpl<int> &ShuffleMask) { in createBSWAPShuffleMask() argument
1322 int ScalarSizeInBytes = VT.getScalarSizeInBits() / 8; in createBSWAPShuffleMask()
1323 for (int I = 0, E = VT.getVectorNumElements(); I != E; ++I) in createBSWAPShuffleMask()
1329 EVT VT = Node->getValueType(0); in ExpandBSWAP() local
1332 if (VT.isScalableVector()) in ExpandBSWAP()
1337 createBSWAPShuffleMask(VT, ShuffleMask); in ExpandBSWAP()
1345 return DAG.getNode(ISD::BITCAST, DL, VT, Op); in ExpandBSWAP()
1350 if (TLI.isOperationLegalOrCustom(ISD::SHL, VT) && in ExpandBSWAP()
1351 TLI.isOperationLegalOrCustom(ISD::SRL, VT) && in ExpandBSWAP()
1352 TLI.isOperationLegalOrCustomOrPromote(ISD::AND, VT) && in ExpandBSWAP()
1353 TLI.isOperationLegalOrCustomOrPromote(ISD::OR, VT)) in ExpandBSWAP()
1362 EVT VT = Node->getValueType(0); in ExpandBITREVERSE() local
1365 if (VT.isScalableVector()) { in ExpandBITREVERSE()
1371 if (TLI.isOperationLegalOrCustom(ISD::BITREVERSE, VT.getScalarType())) { in ExpandBITREVERSE()
1380 unsigned ScalarSizeInBits = VT.getScalarSizeInBits(); in ExpandBITREVERSE()
1383 createBSWAPShuffleMask(VT, BSWAPMask); in ExpandBITREVERSE()
1397 Op = DAG.getNode(ISD::BITCAST, DL, VT, Op); in ExpandBITREVERSE()
1405 if (TLI.isOperationLegalOrCustom(ISD::SHL, VT) && in ExpandBITREVERSE()
1406 TLI.isOperationLegalOrCustom(ISD::SRL, VT) && in ExpandBITREVERSE()
1407 TLI.isOperationLegalOrCustomOrPromote(ISD::AND, VT) && in ExpandBITREVERSE()
1408 TLI.isOperationLegalOrCustomOrPromote(ISD::OR, VT)) { in ExpandBITREVERSE()
1427 EVT VT = Mask.getValueType(); in ExpandVSELECT() local
1433 if (TLI.getOperationAction(ISD::AND, VT) == TargetLowering::Expand || in ExpandVSELECT()
1434 TLI.getOperationAction(ISD::XOR, VT) == TargetLowering::Expand || in ExpandVSELECT()
1435 TLI.getOperationAction(ISD::OR, VT) == TargetLowering::Expand) in ExpandVSELECT()
1451 if (VT.getSizeInBits() != Op1.getValueSizeInBits()) in ExpandVSELECT()
1457 Op1 = DAG.getNode(ISD::BITCAST, DL, VT, Op1); in ExpandVSELECT()
1458 Op2 = DAG.getNode(ISD::BITCAST, DL, VT, Op2); in ExpandVSELECT()
1460 SDValue NotMask = DAG.getNOT(DL, Mask, VT); in ExpandVSELECT()
1462 Op1 = DAG.getNode(ISD::AND, DL, VT, Op1, Mask); in ExpandVSELECT()
1463 Op2 = DAG.getNode(ISD::AND, DL, VT, Op2, NotMask); in ExpandVSELECT()
1464 SDValue Val = DAG.getNode(ISD::OR, DL, VT, Op1, Op2); in ExpandVSELECT()
1478 EVT VT = Mask.getValueType(); in ExpandVP_SELECT() local
1482 if (TLI.getOperationAction(ISD::VP_AND, VT) == TargetLowering::Expand || in ExpandVP_SELECT()
1483 TLI.getOperationAction(ISD::VP_XOR, VT) == TargetLowering::Expand || in ExpandVP_SELECT()
1484 TLI.getOperationAction(ISD::VP_OR, VT) == TargetLowering::Expand) in ExpandVP_SELECT()
1491 SDValue Ones = DAG.getAllOnesConstant(DL, VT); in ExpandVP_SELECT()
1492 SDValue NotMask = DAG.getNode(ISD::VP_XOR, DL, VT, Mask, Ones, Ones, EVL); in ExpandVP_SELECT()
1494 Op1 = DAG.getNode(ISD::VP_AND, DL, VT, Op1, Mask, Ones, EVL); in ExpandVP_SELECT()
1495 Op2 = DAG.getNode(ISD::VP_AND, DL, VT, Op2, NotMask, Ones, EVL); in ExpandVP_SELECT()
1496 return DAG.getNode(ISD::VP_OR, DL, VT, Op1, Op2, Ones, EVL); in ExpandVP_SELECT()
1542 EVT VT = Node->getValueType(0); in ExpandVP_REM() local
1546 if (!TLI.isOperationLegalOrCustom(DivOpc, VT) || in ExpandVP_REM()
1547 !TLI.isOperationLegalOrCustom(ISD::VP_MUL, VT) || in ExpandVP_REM()
1548 !TLI.isOperationLegalOrCustom(ISD::VP_SUB, VT)) in ExpandVP_REM()
1559 SDValue Div = DAG.getNode(DivOpc, DL, VT, Dividend, Divisor, Mask, EVL); in ExpandVP_REM()
1560 SDValue Mul = DAG.getNode(ISD::VP_MUL, DL, VT, Divisor, Div, Mask, EVL); in ExpandVP_REM()
1561 return DAG.getNode(ISD::VP_SUB, DL, VT, Dividend, Mul, Mask, EVL); in ExpandVP_REM()
1589 EVT VT = Src.getValueType(); in ExpandUINT_TO_FLOAT() local
1603 if (((!IsStrict && TLI.getOperationAction(ISD::SINT_TO_FP, VT) == in ExpandUINT_TO_FLOAT()
1605 (IsStrict && TLI.getOperationAction(ISD::STRICT_SINT_TO_FP, VT) == in ExpandUINT_TO_FLOAT()
1607 TLI.getOperationAction(ISD::SRL, VT) == TargetLowering::Expand) { in ExpandUINT_TO_FLOAT()
1617 unsigned BW = VT.getScalarSizeInBits(); in ExpandUINT_TO_FLOAT()
1621 SDValue HalfWord = DAG.getConstant(BW / 2, DL, VT); in ExpandUINT_TO_FLOAT()
1627 SDValue HalfWordMask = DAG.getConstant(HWMask, DL, VT); in ExpandUINT_TO_FLOAT()
1634 SDValue HI = DAG.getNode(ISD::SRL, DL, VT, Src, HalfWord); in ExpandUINT_TO_FLOAT()
1635 SDValue LO = DAG.getNode(ISD::AND, DL, VT, Src, HalfWordMask); in ExpandUINT_TO_FLOAT()
1691 EVT VT = Node->getValueType(0); in ExpandFSUB() local
1692 if (TLI.isOperationLegalOrCustom(ISD::FNEG, VT) && in ExpandFSUB()
1693 TLI.isOperationLegalOrCustom(ISD::FADD, VT)) in ExpandFSUB()
1767 EVT VT = Node->getValueType(0); in ExpandSETCC() local
1769 DAG.getNode(ISD::SELECT_CC, dl, VT, LHS, RHS, in ExpandSETCC()
1770 DAG.getBoolConstant(true, dl, VT, LHS.getValueType()), in ExpandSETCC()
1771 DAG.getBoolConstant(false, dl, VT, LHS.getValueType()), CC); in ExpandSETCC()
1847 EVT VT = Node->getValueType(0); in UnrollStrictFPOp() local
1848 EVT EltVT = VT.getVectorElementType(); in UnrollStrictFPOp()
1849 unsigned NumElems = VT.getVectorNumElements(); in UnrollStrictFPOp()
1898 SDValue Result = DAG.getBuildVector(VT, dl, OpValues); in UnrollStrictFPOp()
1906 EVT VT = Node->getValueType(0); in UnrollVSETCC() local
1907 unsigned NumElems = VT.getVectorNumElements(); in UnrollVSETCC()
1908 EVT EltVT = VT.getVectorElementType(); in UnrollVSETCC()
1927 return DAG.getBuildVector(VT, dl, Ops); in UnrollVSETCC()