Lines Matching refs:SrcVT

735   EVT SrcVT = LD->getMemoryVT();  in LegalizeLoadOps()  local
736 TypeSize SrcWidth = SrcVT.getSizeInBits(); in LegalizeLoadOps()
740 if (SrcWidth != SrcVT.getStoreSizeInBits() && in LegalizeLoadOps()
748 (SrcVT != MVT::i1 || in LegalizeLoadOps()
753 unsigned NewWidth = SrcVT.getStoreSizeInBits(); in LegalizeLoadOps()
773 Result, DAG.getValueType(SrcVT)); in LegalizeLoadOps()
778 DAG.getValueType(SrcVT)); in LegalizeLoadOps()
784 assert(!SrcVT.isVector() && "Unsupported extload!"); in LegalizeLoadOps()
863 SrcVT.getSimpleVT())) { in LegalizeLoadOps()
891 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps()
894 EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT()); in LegalizeLoadOps()
895 if ((LoadVT.isFloatingPoint() == SrcVT.isFloatingPoint()) && in LegalizeLoadOps()
896 (TLI.isTypeLegal(SrcVT) || // Same as SrcVT == LoadVT? in LegalizeLoadOps()
897 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT))) { in LegalizeLoadOps()
901 (LoadVT == SrcVT) ? ISD::NON_EXTLOAD : ExtType; in LegalizeLoadOps()
904 SrcVT, LD->getMemOperand()); in LegalizeLoadOps()
906 ISD::getExtForLoadExtType(SrcVT.isFloatingPoint(), ExtType); in LegalizeLoadOps()
916 EVT SVT = SrcVT.getScalarType(); in LegalizeLoadOps()
918 EVT ISrcVT = SrcVT.changeTypeToInteger(); in LegalizeLoadOps()
932 assert(!SrcVT.isVector() && in LegalizeLoadOps()
945 Chain, Ptr, SrcVT, in LegalizeLoadOps()
951 Result, DAG.getValueType(SrcVT)); in LegalizeLoadOps()
953 ValRes = DAG.getZeroExtendInReg(Result, dl, SrcVT); in LegalizeLoadOps()
1766 EVT SrcVT = SrcOp.getValueType(); in EmitStackConvert() local
1771 if ((SrcVT.bitsGT(SlotVT) && in EmitStackConvert()
1791 if (SrcVT.bitsGT(SlotVT)) in EmitStackConvert()
1795 assert(SrcVT.bitsEq(SlotVT) && "Invalid store"); in EmitStackConvert()
2628 EVT SrcVT = Op0.getValueType(); in ExpandLegalINT_TO_FP() local
2632 if (SrcVT == MVT::i32 && TLI.isTypeLegal(MVT::f64) && in ExpandLegalINT_TO_FP()
2704 if (((SrcVT == MVT::i32 || SrcVT == MVT::i64) && DestVT == MVT::f32) || in ExpandLegalINT_TO_FP()
2705 (SrcVT == MVT::i64 && DestVT == MVT::f64)) { in ExpandLegalINT_TO_FP()
2721 EVT SetCCVT = getSetCCResultType(SrcVT); in ExpandLegalINT_TO_FP()
2724 dl, SetCCVT, Op0, DAG.getConstant(0, dl, SrcVT), ISD::SETLT); in ExpandLegalINT_TO_FP()
2726 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP()
2728 SDValue Shr = DAG.getNode(ISD::SRL, dl, SrcVT, Op0, ShiftConst); in ExpandLegalINT_TO_FP()
2729 SDValue AndConst = DAG.getConstant(1, dl, SrcVT); in ExpandLegalINT_TO_FP()
2730 SDValue And = DAG.getNode(ISD::AND, dl, SrcVT, Op0, AndConst); in ExpandLegalINT_TO_FP()
2731 SDValue Or = DAG.getNode(ISD::OR, dl, SrcVT, And, Shr); in ExpandLegalINT_TO_FP()
2737 SDValue InCvt = DAG.getSelect(dl, SrcVT, SignBitTest, Or, Op0); in ExpandLegalINT_TO_FP()
2769 SrcVT.getSizeInBits() - 1 && in ExpandLegalINT_TO_FP()
2779 SDValue SignSet = DAG.getSetCC(dl, getSetCCResultType(SrcVT), Op0, in ExpandLegalINT_TO_FP()
2780 DAG.getConstant(0, dl, SrcVT), ISD::SETLT); in ExpandLegalINT_TO_FP()
2790 switch (SrcVT.getSimpleVT().SimpleTy) { in ExpandLegalINT_TO_FP()
3240 EVT SrcVT = Op.getValueType(); in ExpandNode() local
3242 if (SrcVT.getScalarType() == MVT::bf16) { in ExpandNode()
3247 if ((Tmp1 = EmitStackConvert(Op, SrcVT, DstVT, dl))) in ExpandNode()