Lines Matching refs:RoundWidth
576 unsigned RoundWidth = 1 << LogStWidth; in LegalizeStoreOps() local
577 assert(RoundWidth < StWidthBits); in LegalizeStoreOps()
578 unsigned ExtraWidth = StWidthBits - RoundWidth; in LegalizeStoreOps()
579 assert(ExtraWidth < RoundWidth); in LegalizeStoreOps()
580 assert(!(RoundWidth % 8) && !(ExtraWidth % 8) && in LegalizeStoreOps()
582 EVT RoundVT = EVT::getIntegerVT(*DAG.getContext(), RoundWidth); in LegalizeStoreOps()
594 IncrementSize = RoundWidth / 8; in LegalizeStoreOps()
599 DAG.getConstant(RoundWidth, dl, in LegalizeStoreOps()
616 IncrementSize = RoundWidth / 8; in LegalizeStoreOps()
788 unsigned RoundWidth = 1 << LogSrcWidth; in LegalizeLoadOps() local
789 assert(RoundWidth < SrcWidthBits); in LegalizeLoadOps()
790 unsigned ExtraWidth = SrcWidthBits - RoundWidth; in LegalizeLoadOps()
791 assert(ExtraWidth < RoundWidth); in LegalizeLoadOps()
792 assert(!(RoundWidth % 8) && !(ExtraWidth % 8) && in LegalizeLoadOps()
794 EVT RoundVT = EVT::getIntegerVT(*DAG.getContext(), RoundWidth); in LegalizeLoadOps()
808 IncrementSize = RoundWidth / 8; in LegalizeLoadOps()
823 DAG.getConstant(RoundWidth, dl, in LegalizeLoadOps()
837 IncrementSize = RoundWidth / 8; in LegalizeLoadOps()