Lines Matching refs:NewEltVT

3414       EVT NewEltVT = TLI.getTypeToTransformTo(*DAG.getContext(), EltVT);  in ExpandNode()  local
3419 if (NewEltVT.bitsLT(EltVT)) { in ExpandNode()
3426 EVT::getVectorVT(*DAG.getContext(), NewEltVT, in ExpandNode()
3427 VT.getSizeInBits() / NewEltVT.getSizeInBits()); in ExpandNode()
3454 EltVT = NewEltVT; in ExpandNode()
4924 MVT EltVT, MVT NewEltVT) { in getPromotedVectorElementType() argument
4925 unsigned OldEltsPerNewElt = EltVT.getSizeInBits() / NewEltVT.getSizeInBits(); in getPromotedVectorElementType()
4927 ? NewEltVT in getPromotedVectorElementType()
4928 : MVT::getVectorVT(NewEltVT, OldEltsPerNewElt); in getPromotedVectorElementType()
5405 MVT NewEltVT = NVT.getVectorElementType(); in PromoteNode() local
5415 assert(NewEltVT.bitsLE(EltVT) && "not handled"); in PromoteNode()
5417 MVT MidVT = getPromotedVectorElementType(TLI, EltVT, NewEltVT); in PromoteNode()
5427 DAG.getNode(MidVT == NewEltVT ? ISD::BUILD_VECTOR : ISD::CONCAT_VECTORS, in PromoteNode()
5435 MVT NewEltVT = NVT.getVectorElementType(); in PromoteNode() local
5450 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode()
5452 MVT MidVT = getPromotedVectorElementType(TLI, EltVT, NewEltVT); in PromoteNode()
5468 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, NewEltVT, in PromoteNode()
5479 MVT NewEltVT = NVT.getVectorElementType(); in PromoteNode() local
5496 assert(NewEltVT.bitsLT(EltVT) && "not handled"); in PromoteNode()
5498 MVT MidVT = getPromotedVectorElementType(TLI, EltVT, NewEltVT); in PromoteNode()
5517 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, NewEltVT, in PromoteNode()
5529 MVT NewEltVT = NVT.getVectorElementType(); in PromoteNode() local
5538 MVT MidVT = getPromotedVectorElementType(TLI, EltVT, NewEltVT); in PromoteNode()