Lines Matching refs:DestVT
163 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
165 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
890 EVT DestVT = Node->getValueType(0); in LegalizeLoadOps() local
891 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps()
919 EVT IDestVT = DestVT.changeTypeToInteger(); in LegalizeLoadOps()
926 dl, DestVT, Result); in LegalizeLoadOps()
1759 EVT DestVT, const SDLoc &dl) { in EmitStackConvert() argument
1760 return EmitStackConvert(SrcOp, SlotVT, DestVT, dl, DAG.getEntryNode()); in EmitStackConvert()
1764 EVT DestVT, const SDLoc &dl, in EmitStackConvert() argument
1767 Type *DestType = DestVT.getTypeForEVT(*DAG.getContext()); in EmitStackConvert()
1773 (SlotVT.bitsLT(DestVT) && in EmitStackConvert()
1774 !TLI.isLoadExtLegalOrCustom(ISD::EXTLOAD, DestVT, SlotVT))) in EmitStackConvert()
1800 if (SlotVT.bitsEq(DestVT)) in EmitStackConvert()
1801 return DAG.getLoad(DestVT, dl, Store, FIPtr, PtrInfo, DestAlign); in EmitStackConvert()
1803 assert(SlotVT.bitsLT(DestVT) && "Unknown extension!"); in EmitStackConvert()
1804 return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, PtrInfo, SlotVT, in EmitStackConvert()
2624 EVT DestVT = Node->getValueType(0); in ExpandLegalINT_TO_FP() local
2633 (DestVT.bitsLE(MVT::f64) || in ExpandLegalINT_TO_FP()
2636 DestVT))) { in ExpandLegalINT_TO_FP()
2684 if (DestVT != Sub.getValueType()) { in ExpandLegalINT_TO_FP()
2687 DAG.getStrictFPExtendOrRound(Sub, Chain, dl, DestVT); in ExpandLegalINT_TO_FP()
2695 Result = DAG.getFPExtendOrRound(Sub, dl, DestVT); in ExpandLegalINT_TO_FP()
2704 if (((SrcVT == MVT::i32 || SrcVT == MVT::i64) && DestVT == MVT::f32) || in ExpandLegalINT_TO_FP()
2705 (SrcVT == MVT::i64 && DestVT == MVT::f64)) { in ExpandLegalINT_TO_FP()
2738 Fast = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, { DestVT, MVT::Other }, in ExpandLegalINT_TO_FP()
2740 Slow = DAG.getNode(ISD::STRICT_FADD, dl, { DestVT, MVT::Other }, in ExpandLegalINT_TO_FP()
2752 SDValue SignCvt = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Or); in ExpandLegalINT_TO_FP()
2753 Slow = DAG.getNode(ISD::FADD, dl, DestVT, SignCvt, SignCvt); in ExpandLegalINT_TO_FP()
2754 Fast = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0); in ExpandLegalINT_TO_FP()
2757 return DAG.getSelect(dl, DestVT, SignBitTest, Slow, Fast); in ExpandLegalINT_TO_FP()
2762 Node->isStrictFPOpcode() ? ISD::STRICT_FADD : ISD::FADD, DestVT)) in ExpandLegalINT_TO_FP()
2768 assert(APFloat::semanticsPrecision(DAG.EVTToAPFloatSemantics(DestVT)) >= in ExpandLegalINT_TO_FP()
2774 Tmp1 = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, { DestVT, MVT::Other }, in ExpandLegalINT_TO_FP()
2777 Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0); in ExpandLegalINT_TO_FP()
2809 if (DestVT == MVT::f32) in ExpandLegalINT_TO_FP()
2816 ISD::EXTLOAD, dl, DestVT, DAG.getEntryNode(), CPIdx, in ExpandLegalINT_TO_FP()
2825 SDValue Result = DAG.getNode(ISD::STRICT_FADD, dl, { DestVT, MVT::Other }, in ExpandLegalINT_TO_FP()
2831 return DAG.getNode(ISD::FADD, dl, DestVT, Tmp1, FudgeInReg); in ExpandLegalINT_TO_FP()
2844 EVT DestVT = N->getValueType(0); in PromoteLegalINT_TO_FP() local
2880 DAG.getNode(OpToUse, dl, {DestVT, MVT::Other}, in PromoteLegalINT_TO_FP()
2890 DAG.getNode(OpToUse, dl, DestVT, in PromoteLegalINT_TO_FP()
2905 EVT DestVT = N->getValueType(0); in PromoteLegalFP_TO_INT() local
2908 EVT NewOutTy = DestVT; in PromoteLegalFP_TO_INT()
2941 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, DestVT, Operation); in PromoteLegalFP_TO_INT()