Lines Matching refs:SETCC

1097   if (N.getOpcode() == ISD::SETCC) {  in isSetCCEquivalent()
1361 if (N1->getOpcode() == ISD::SETCC && N00->getOpcode() == ISD::SETCC && in reassociateOpsCommutative()
1362 N01->getOpcode() == ISD::SETCC) { in reassociateOpsCommutative()
1991 case ISD::SETCC: return visitSETCC(N); in visit()
2396 if (N.getOpcode() != ISD::SETCC || in isTruncateOf()
2639 if (Z.getOperand(0).getOpcode() != ISD::SETCC || in foldAddSubBoolOfMaskedVal()
5581 if (N0.getOperand(0).getOpcode() != ISD::SETCC) in isSaturatingMinMax()
6074 TLI.isOperationLegal(ISD::SETCC, OpVT)))) in foldLogicOfSetCCs()
6156 if (LHS->getOpcode() != ISD::SETCC || RHS->getOpcode() != ISD::SETCC || in foldAndOrOfSETCC()
6283 return DAG.getNode(ISD::SETCC, DL, VT, AbsOp, in foldAndOrOfSETCC()
6313 return DAG.getNode(ISD::SETCC, DL, VT, AndOp, in foldAndOrOfSETCC()
6321 return DAG.getNode(ISD::SETCC, DL, VT, AndOp, in foldAndOrOfSETCC()
9449 case ISD::SETCC: in visitXOR()
9873 if (N01CV && N01CV->isConstant() && N00.getOpcode() == ISD::SETCC && in visitSHL()
11270 if (Cond.getOpcode() != ISD::SETCC || !Cond.hasOneUse() || in foldSelectOfConstantsUsingSra()
11302 if (Cond.getOpcode() != ISD::SETCC || !Cond->hasOneUse()) in shouldConvertSelectOfConstantsToMath()
11474 if (N0.getOpcode() != ISD::SETCC || !N0.hasOneUse()) in foldVSelectToSignBitSplatMask()
11635 if (N0.getOpcode() == ISD::SETCC) { in visitSELECT()
12175 if (N0.getOpcode() == ISD::SETCC) { in visitVSELECT()
12234 TLI.isOperationLegalOrCustom(ISD::SETCC, WideVT)) { in visitVSELECT()
12474 if (SCC.getOpcode() == ISD::SETCC) { in visitSELECT_CC()
12507 if (PreferSetCC && Combined.getOpcode() != ISD::SETCC) { in visitSETCC()
12636 return DAG.getNode(ISD::SETCC, SDLoc(N), N->getVTList(), LHS, RHS, Cond); in visitSETCCCARRY()
12820 if (ExtOpc != ISD::ANY_EXTEND && User->getOpcode() == ISD::SETCC) { in ExtendUsesToFormExtLoad()
12882 CombineTo(SetCC, DAG.getNode(ISD::SETCC, DL, SetCC->getValueType(0), Ops)); in ExtendSetCCUses()
13081 VSel.getOperand(0).getOpcode() != ISD::SETCC) in matchVSelectOpSizesWithSetCC()
13216 if (LegalOperations || SetCC.getOpcode() != ISD::SETCC || in foldExtendedSignBitTest()
13248 if (N0.getOpcode() != ISD::SETCC) in foldSextSetcc()
13290 if (N0.hasOneUse() && TLI.isOperationLegalOrCustom(ISD::SETCC, VT) && in foldSextSetcc()
13291 !TLI.isOperationLegalOrCustom(ISD::SETCC, SVT)) { in foldSextSetcc()
13362 (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, N00VT))) { in foldSextSetcc()
13831 if (N0.getOpcode() == ISD::SETCC) { in visitZERO_EXTEND()
13849 SDValue VSetCC = DAG.getNode(ISD::SETCC, DL, VT, N0.getOperand(0), in visitZERO_EXTEND()
13859 DAG.getNode(ISD::SETCC, DL, MatchingVectorType, N0.getOperand(0), in visitZERO_EXTEND()
14033 if (N0.getOpcode() == ISD::SETCC) { in visitANY_EXTEND()
16743 Cond.getOpcode() == ISD::SETCC && Cond.getOperand(0) == X && in visitFMUL()
17406 if (N0.getOpcode() == ISD::SETCC && N0.getValueType() == MVT::i1 && in visitSINT_TO_FP()
17417 N0.getOperand(0).getOpcode() == ISD::SETCC && !VT.isVector() && in visitSINT_TO_FP()
17457 if (N0.getOpcode() == ISD::SETCC && !VT.isVector() && in visitUINT_TO_FP()
17870 if (N1->getOpcode() == ISD::SETCC && N1.hasOneUse()) { in visitBRCOND()
17917 if (N1.getOpcode() == ISD::SETCC && in visitBRCOND()
18011 if (Op0.getOpcode() != ISD::SETCC && Op1.getOpcode() != ISD::SETCC) { in rebuildSetCC()
18053 if (Simp.getNode() && Simp.getOpcode() == ISD::SETCC) in visitBR_CC()
26818 assert(N0.getOpcode() == ISD::SETCC && in SimplifySelect()
26832 SDValue SETCC = DAG.getNode(ISD::SETCC, SDLoc(N0), in SimplifySelect() local
26836 AddToWorklist(SETCC.getNode()); in SimplifySelect()
26837 SDValue SelectNode = DAG.getSelect(SDLoc(SCC), SCC.getValueType(), SETCC, in SimplifySelect()
26872 if (Cmp.getOpcode() == ISD::SETCC) { in SimplifySelectOps()
27336 (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, CmpOpVT))) { in SimplifySelectCC()