Lines Matching refs:LegalOperations
158 bool LegalOperations = false; member in __anonffc06dc60111::DAGCombiner
337 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedBits()
836 return TLI.isOperationLegalOrCustom(Opcode, VT, LegalOperations); in hasOperation()
1470 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedBits()
1489 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedVectorElts()
1589 if (!LegalOperations) in PromoteIntBinOp()
1657 if (!LegalOperations) in PromoteIntShiftOp()
1706 if (!LegalOperations) in PromoteExtend()
1734 if (!LegalOperations) in PromoteLoad()
1819 LegalOperations = Level >= AfterLegalizeVectorOps; in Run()
2773 if ((!LegalOperations || in visitADDLike()
2978 if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) && in visitADD()
3413 if (!LegalOperations || in visitUADDO_CARRY()
3700 if (!LegalOperations || in visitSADDO_CARRY()
3746 !(!LegalOperations || hasOperation(ISD::USUBSAT, DstVT))) in foldSubToUSubSat()
3793 SelectionDAG &DAG, bool LegalOperations) { in tryFoldToZero() argument
3796 if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) in tryFoldToZero()
3816 return tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in visitSUB()
3853 if (!LegalOperations || TLI.isOperationLegal(NewSh, VT)) in visitSUB()
4079 if (!LegalOperations && TLI.isOffsetFoldingLegal(GA)) { in visitSUB()
4112 if (!LegalOperations && N1.getOpcode() == ISD::SRL && N1.hasOneUse()) { in visitSUB()
4313 if (!LegalOperations || in visitUSUBO_CARRY()
4328 if (!LegalOperations || in visitSSUBO_CARRY()
4441 if (!LegalOperations || TLI.isOperationLegalOrCustom(LoHiOpc, VT)) { in visitMUL()
4572 if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::AND, VT)) && in visitMUL()
5317 if (!HiExists && (!LegalOperations || in SimplifyNodeWithTwoResults()
5325 if (!LoExists && (!LegalOperations || in SimplifyNodeWithTwoResults()
5341 (!LegalOperations || in SimplifyNodeWithTwoResults()
5351 (!LegalOperations || in SimplifyNodeWithTwoResults()
5788 if ((VT.isVector() || LegalOperations) && in hoistLogicOpWithSameOpcodeHands()
5814 if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
5910 ShOp = tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in hoistLogicOpWithSameOpcodeHands()
5923 ShOp = tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in hoistLogicOpWithSameOpcodeHands()
5955 if (LegalOperations || VT.getScalarType() != MVT::i1) in foldLogicOfSetCCs()
6072 (!LegalOperations || in foldLogicOfSetCCs()
6424 (!LegalOperations || in isAndLoadExtLoad()
6440 if (LegalOperations && in isAndLoadExtLoad()
6503 if (LegalOperations && in isLegalNarrowLdSt()
6531 if (LegalOperations && in isLegalNarrowLdSt()
7204 (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, ExtVT))) { in visitAND()
7302 ((!LegalOperations && LN0->isSimple()) || in visitAND()
7357 if (LegalOperations || VT.isVector()) in visitAND()
7367 if (!LegalOperations) in MatchBSwapHWordLow()
7637 if (!LegalOperations) in MatchBSwapHWord()
7706 if (!LegalOperations && (N0.isUndef() || N1.isUndef())) in visitORLike()
8001 if ((!LegalOperations || TLI.isOperationLegal(ISD::ADD, VT)) && in visitOR()
8008 if (LegalOperations || VT.isVector()) in visitOR()
8414 if (LegalOperations && !HasROTL && !HasROTR && !HasFSHL && !HasFSHR) in MatchRotate()
8565 bool UseROTL = !LegalOperations || HasROTL; in MatchRotate()
8569 bool UseFSHL = !LegalOperations || HasFSHL; in MatchRotate()
8882 if (LegalOperations || OptLevel == CodeGenOptLevel::None) in mergeTruncStores()
9204 if (LegalOperations && in MatchLoadCombine()
9236 if (NeedsBswap && (LegalOperations || NeedsZext) && in MatchLoadCombine()
9242 if (NeedsBswap && NeedsZext && LegalOperations && in MatchLoadCombine()
9270 SDLoc(N), LegalOperations)) in MatchLoadCombine()
9426 if ((!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) && in visitXOR()
9432 if ((!LegalOperations || TLI.isOperationLegal(ISD::ADD, VT)) && in visitXOR()
9444 if (!LegalOperations || in visitXOR()
9548 return tryFoldToZero(DL, TLI, VT, DAG, LegalOperations); in visitXOR()
10892 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::SHL, VT)) { in visitSHLSAT()
11046 (!LegalOperations || hasOperation(ISD::BSWAP, HalfVT))) { in visitBSWAP()
11102 if (!LegalOperations || TLI.isOperationLegal(ISD::CTLZ_ZERO_UNDEF, VT)) in visitCTLZ()
11131 if (!LegalOperations || TLI.isOperationLegal(ISD::CTTZ_ZERO_UNDEF, VT)) in visitCTTZ()
11229 True, DAG, LegalOperations, ForCodeSize); in combineMinNumMaxNum()
11245 RHS, DAG, LegalOperations, ForCodeSize); in combineMinNumMaxNum()
11332 if (CondVT != MVT::i1 || LegalOperations) { in foldSelectOfConstants()
11362 assert(CondVT == MVT::i1 && !LegalOperations); in foldSelectOfConstants()
11653 if (!LegalOperations && TLI.isOperationLegalOrCustom(ISD::UADDO, VT) && in visitSELECT()
11678 (!LegalOperations && in visitSELECT()
11958 MST->getMemoryVT(), LegalOperations)) { in visitMSTORE()
12998 (LegalOperations && !TLI.isOperationLegal(N0.getOpcode(), VT))) in CombineZExtLogicopShiftLoad()
13005 (LegalOperations && !TLI.isOperationLegal(N1.getOpcode(), VT))) in CombineZExtLogicopShiftLoad()
13076 if (LegalOperations || !TLI.isOperationLegalOrCustom(ISD::VSELECT, VT)) in matchVSelectOpSizesWithSetCC()
13110 bool LegalOperations, SDNode *N, in tryToFoldExtOfExtload() argument
13121 if ((LegalOperations || !LN0->isSimple() || in tryToFoldExtOfExtload()
13141 bool LegalOperations, SDNode *N, SDValue N0, in tryToFoldExtOfLoad() argument
13149 ((LegalOperations || VT.isFixedLengthVector() || in tryToFoldExtOfLoad()
13184 bool LegalOperations, SDNode *N, SDValue N0, in tryToFoldExtOfMaskedLoad() argument
13193 if ((LegalOperations || !cast<MaskedLoadSDNode>(N0)->isSimple()) && in tryToFoldExtOfMaskedLoad()
13211 bool LegalOperations) { in foldExtendedSignBitTest() argument
13216 if (LegalOperations || SetCC.getOpcode() != ISD::SETCC || in foldExtendedSignBitTest()
13264 if (VT.isVector() && !LegalOperations && in foldSextSetcc()
13362 (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, N00VT))) { in foldSextSetcc()
13449 if (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND_INREG, in visitSIGN_EXTEND()
13462 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0, in visitSIGN_EXTEND()
13467 tryToFoldExtOfMaskedLoad(DAG, TLI, VT, LegalOperations, N, N0, in visitSIGN_EXTEND()
13478 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::SEXTLOAD)) in visitSIGN_EXTEND()
13486 (!LegalOperations && TLI.isOperationLegal(N0.getOpcode(), VT))) { in visitSIGN_EXTEND()
13524 if (SDValue V = foldExtendedSignBitTest(N, DAG, LegalOperations)) in visitSIGN_EXTEND()
13532 (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, VT)) && in visitSIGN_EXTEND()
13564 (!LegalOperations || (TLI.isOperationLegal(ISD::ZERO_EXTEND, VT) && in visitSIGN_EXTEND()
13709 if (!LegalOperations || (TLI.isOperationLegal(ISD::AND, SrcVT) && in visitZERO_EXTEND()
13721 if (!LegalOperations || TLI.isOperationLegal(ISD::AND, VT)) { in visitZERO_EXTEND()
13748 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0, in visitZERO_EXTEND()
13753 tryToFoldExtOfMaskedLoad(DAG, TLI, VT, LegalOperations, N, N0, in visitZERO_EXTEND()
13769 (!LegalOperations && TLI.isOperationLegal(N0.getOpcode(), VT))) { in visitZERO_EXTEND()
13825 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::ZEXTLOAD)) in visitZERO_EXTEND()
13828 if (SDValue V = foldExtendedSignBitTest(N, DAG, LegalOperations)) in visitZERO_EXTEND()
13836 if (!LegalOperations && VT.isVector() && in visitZERO_EXTEND()
13982 tryToFoldExtOfLoad(DAG, *this, TLI, VT, LegalOperations, N, N0, in visitANY_EXTEND()
14022 if (!LegalOperations || TLI.isLoadExtLegal(ExtType, VT, MemVT)) { in visitANY_EXTEND()
14042 if (VT.isVector() && !LegalOperations) { in visitANY_EXTEND()
14446 (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND, VT))) in visitSIGN_EXTEND_INREG()
14463 (!LegalOperations || in visitSIGN_EXTEND_INREG()
14473 (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND, VT))) in visitSIGN_EXTEND_INREG()
14513 ((!LegalOperations && cast<LoadSDNode>(N0)->isSimple() && in visitSIGN_EXTEND_INREG()
14531 ((!LegalOperations && cast<LoadSDNode>(N0)->isSimple()) && in visitSIGN_EXTEND_INREG()
14596 (!LegalOperations || in visitSIGN_EXTEND_INREG()
14611 bool LegalOperations) { in foldExtendVectorInregToExtendOfSubvector() argument
14635 if (LegalOperations && !TLI.isOperationLegal(Opcode, VT)) in foldExtendVectorInregToExtendOfSubvector()
14660 LegalOperations)) in visitEXTEND_VECTOR_INREG()
14727 LegalTypes && !LegalOperations && N0->hasOneUse() && VT != MVT::i1) { in visitTRUNCATE()
14753 if ((!LegalOperations || TLI.isOperationLegal(ISD::SELECT, SrcVT)) && in visitTRUNCATE()
14765 (!LegalOperations || TLI.isOperationLegal(ISD::SHL, VT)) && in visitTRUNCATE()
14790 if (N0.getOpcode() == ISD::BUILD_VECTOR && !LegalOperations && in visitTRUNCATE()
14808 (!LegalOperations || TLI.isOperationLegal(ISD::SPLAT_VECTOR, VT))) { in visitTRUNCATE()
14916 (!LegalOperations || in visitTRUNCATE()
14960 if (!LegalOperations && N0.hasOneUse() && in visitTRUNCATE()
14981 if (((!LegalOperations && N0.getOpcode() == ISD::UADDO_CARRY) || in visitTRUNCATE()
14995 if (!LegalOperations && N0.hasOneUse() && in visitTRUNCATE()
15038 if ((!LegalOperations || TLI.isOperationLegal(ISD::LOAD, VT)) && in CombineConsecutiveLoads()
15089 if (LegalOperations && !TLI.isOperationLegal(FPOpcode, VT)) in foldBitcastedFPLogic()
15136 (!LegalOperations && VT.isInteger() && N0.getValueType().isInteger() && in visitBITCAST()
15148 if (!LegalOperations || in visitBITCAST()
15190 ((!LegalOperations && cast<LoadSDNode>(N0)->isSimple()) || in visitBITCAST()
15574 bool HasFMAD = !UseVP && (LegalOperations && TLI.isFMADLegal(DAG, N)); in visitFADDForFMACombine()
15579 (!LegalOperations || matcher.isOperationLegalOrCustom(ISD::FMA, VT)); in visitFADDForFMACombine()
15811 bool HasFMAD = !UseVP && (LegalOperations && TLI.isFMADLegal(DAG, N)); in visitFSUBForFMACombine()
15816 (!LegalOperations || matcher.isOperationLegalOrCustom(ISD::FMA, VT)); in visitFSUBForFMACombine()
16147 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FMA, VT)); in visitFMULForFMADistributiveCombine()
16152 (LegalOperations && TLI.isFMADLegal(DAG, N)); in visitFMULForFMADistributiveCombine()
16268 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) in visitFADD()
16270 N1, DAG, LegalOperations, ForCodeSize)) in visitFADD()
16274 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) in visitFADD()
16276 N0, DAG, LegalOperations, ForCodeSize)) in visitFADD()
16434 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::STRICT_FSUB, VT)) in visitSTRICT_FADD()
16436 N1, DAG, LegalOperations, ForCodeSize)) { in visitSTRICT_FADD()
16442 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::STRICT_FSUB, VT)) in visitSTRICT_FADD()
16444 N0, DAG, LegalOperations, ForCodeSize)) { in visitSTRICT_FADD()
16502 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize)) in visitFSUB()
16504 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT)) in visitFSUB()
16523 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize)) in visitFSUB()
16707 if (!LegalOperations || TLI.isOperationLegal(ISD::FSUB, VT)) { in visitFMUL()
16719 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0); in visitFMUL()
16723 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1); in visitFMUL()
16818 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0); in visitFMA()
16822 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1); in visitFMA()
16874 (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))) { in visitFMA()
16911 SDValue(N, 0), DAG, LegalOperations, ForCodeSize)) in visitFMA()
17048 (!LegalOperations || in visitFDIV()
17142 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize, CostN0); in visitFDIV()
17146 TLI.getNegatedExpression(N1, DAG, LegalOperations, ForCodeSize, CostN1); in visitFDIV()
17243 if (!LegalOperations || TLI.isOperationLegal(ISD::FABS, VT)) in visitFCOPYSIGN()
17246 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT)) in visitFCOPYSIGN()
17391 (!LegalOperations || in visitSINT_TO_FP()
17408 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT))) { in visitSINT_TO_FP()
17418 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT))) { in visitSINT_TO_FP()
17443 (!LegalOperations || in visitUINT_TO_FP()
17458 (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::ConstantFP, VT))) { in visitUINT_TO_FP()
17747 TLI.getNegatedExpression(N0, DAG, LegalOperations, ForCodeSize)) in visitFNEG()
20951 if ((isTypeLegal(MVT::i32) && !LegalOperations && ST->isSimple()) || in replaceStoreOfFPConstant()
20961 if ((TLI.isTypeLegal(MVT::i64) && !LegalOperations && in replaceStoreOfFPConstant()
21071 if (((!LegalOperations && ST->isSimple()) || in visitSTORE()
21249 ST->getMemoryVT(), LegalOperations)) { in visitSTORE()
21778 if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) { in visitINSERT_VECTOR_ELT()
21874 if (!LegalOperations && llvm::isNullConstant(InVal) && in visitINSERT_VECTOR_ELT()
21989 bool LegalOperations) { in scalarizeExtractedBinop() argument
22167 if (LegalOperations && in refineExtractVectorEltIntoMultipleNarrowExtractVectorElts()
22259 if (SDValue BO = scalarizeExtractedBinop(N, DAG, LegalOperations)) in visitEXTRACT_VECTOR_ELT()
22357 if (!LegalOperations || in visitEXTRACT_VECTOR_ELT()
22423 if (!LegalOperations && !IndexC && VecOp.hasOneUse() && in visitEXTRACT_VECTOR_ELT()
22433 if (!LegalOperations || !IndexC) in visitEXTRACT_VECTOR_ELT()
22781 if (LegalOperations && in createBuildVecShuffle()
22815 if (LegalOperations && !TLI.isOperationLegal(ISD::VECTOR_SHUFFLE, InVT1)) in createBuildVecShuffle()
22965 if (LegalOperations && !TLI.isOperationLegal(ISD::VECTOR_SHUFFLE, VT)) in reduceBuildVecToShuffle()
23214 if (LegalOperations) in convertBuildVecZextToZext()
23285 (LegalOperations && !TLI.isOperationLegalOrCustom(ISD::BITCAST, OpIntVT))) in convertBuildVecZextToBuildVecWithZeros()
23348 (LegalOperations && in convertBuildVecZextToBuildVecWithZeros()
23398 if (!LegalOperations) { in visitBUILD_VECTOR()
23716 bool LegalOperations) { in combineConcatVectorOfShuffleAndItsOperands() argument
23728 (LegalOperations && in combineConcatVectorOfShuffleAndItsOperands()
23849 if (!LegalOperations && Scalar.getOpcode() == ISD::SCALAR_TO_VECTOR && in visitCONCAT_VECTORS()
23956 N, DAG, TLI, LegalTypes, LegalOperations)) in visitCONCAT_VECTORS()
24024 bool LegalOperations) { in narrowInsertExtractVectorBinOp() argument
24038 if (!TLI.isOperationLegalOrCustom(BinOpcode, SubVT, LegalOperations)) in narrowInsertExtractVectorBinOp()
24060 bool LegalOperations) { in narrowExtractedVectorBinOp() argument
24064 if (SDValue V = narrowInsertExtractVectorBinOp(Extract, DAG, LegalOperations)) in narrowExtractedVectorBinOp()
24119 LegalOperations)) in narrowExtractedVectorBinOp()
24259 bool LegalOperations) { in foldExtractSubvectorFromShuffleVector() argument
24281 if (LegalOperations && in foldExtractSubvectorFromShuffleVector()
24430 if (!LegalOperations || TLI.isOperationLegal(ISD::SPLAT_VECTOR, NVT)) in visitEXTRACT_SUBVECTOR()
24437 (!LegalOperations || TLI.isOperationLegal(ISD::BITCAST, NVT))) { in visitEXTRACT_SUBVECTOR()
24523 foldExtractSubvectorFromShuffleVector(N, DAG, TLI, LegalOperations)) in visitEXTRACT_SUBVECTOR()
24576 if (LegalOperations && !TLI.isOperationLegal(ISD::BITCAST, NVT)) in visitEXTRACT_SUBVECTOR()
24587 if (SDValue NarrowBOp = narrowExtractedVectorBinOp(N, DAG, LegalOperations)) in visitEXTRACT_SUBVECTOR()
24813 bool LegalOperations) { in canCombineShuffleToExtendVectorInreg() argument
24835 (LegalOperations && !TLI.isOperationLegalOrCustom(Opcode, OutVT))) in canCombineShuffleToExtendVectorInreg()
24851 bool LegalOperations) { in combineShuffleToAnyExtendVectorInreg() argument
24877 Opcode, VT, isAnyExtend, DAG, TLI, /*LegalTypes=*/true, LegalOperations); in combineShuffleToAnyExtendVectorInreg()
24889 bool LegalOperations) { in combineShuffleToZeroExtendVectorInReg() argument
24999 LegalOperations); in combineShuffleToZeroExtendVectorInReg()
25176 bool LegalOperations) { in combineShuffleOfBitcast() argument
25194 (LegalOperations && in combineShuffleOfBitcast()
25447 if ((!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) && in visitVECTOR_SHUFFLE()
25534 combineShuffleToAnyExtendVectorInreg(SVN, DAG, TLI, LegalOperations)) in visitVECTOR_SHUFFLE()
25755 if (SDValue V = combineShuffleOfBitcast(SVN, DAG, TLI, LegalOperations)) in visitVECTOR_SHUFFLE()
26022 LegalOperations)) in visitVECTOR_SHUFFLE()
26544 if (LegalOperations) in XformToShuffleWithZero()
26770 LegalOperations)) { in SimplifyVBinOp()
27336 (!LegalOperations || TLI.isOperationLegal(ISD::SETCC, CmpOpVT))) { in SimplifySelectCC()
27396 (!LegalOperations || TLI.isOperationLegal(ISD::CTTZ, VT))) in SimplifySelectCC()
27403 (!LegalOperations || TLI.isOperationLegal(ISD::CTLZ, VT))) in SimplifySelectCC()
27451 if (SDValue S = TLI.BuildSDIV(N, DAG, LegalOperations, Built)) { in BuildSDIV()
27492 if (SDValue S = TLI.BuildUDIV(N, DAG, LegalOperations, Built)) { in BuildUDIV()