Lines Matching refs:HandOpcode
5760 unsigned HandOpcode = N0.getOpcode(); in hoistLogicOpWithSameOpcodeHands() local
5762 assert(HandOpcode == N1.getOpcode() && "Bad input!"); in hoistLogicOpWithSameOpcodeHands()
5776 if (ISD::isExtOpcode(HandOpcode) || ISD::isExtVecInRegOpcode(HandOpcode) || in hoistLogicOpWithSameOpcodeHands()
5777 (HandOpcode == ISD::SIGN_EXTEND_INREG && in hoistLogicOpWithSameOpcodeHands()
5793 if ((HandOpcode == ISD::ANY_EXTEND || in hoistLogicOpWithSameOpcodeHands()
5794 HandOpcode == ISD::ANY_EXTEND_VECTOR_INREG) && in hoistLogicOpWithSameOpcodeHands()
5799 if (HandOpcode == ISD::SIGN_EXTEND_INREG) in hoistLogicOpWithSameOpcodeHands()
5800 return DAG.getNode(HandOpcode, DL, VT, Logic, N0.getOperand(1)); in hoistLogicOpWithSameOpcodeHands()
5801 return DAG.getNode(HandOpcode, DL, VT, Logic); in hoistLogicOpWithSameOpcodeHands()
5805 if (HandOpcode == ISD::TRUNCATE) { in hoistLogicOpWithSameOpcodeHands()
5823 return DAG.getNode(HandOpcode, DL, VT, Logic); in hoistLogicOpWithSameOpcodeHands()
5828 if ((HandOpcode == ISD::SHL || HandOpcode == ISD::SRL || in hoistLogicOpWithSameOpcodeHands()
5829 HandOpcode == ISD::SRA || HandOpcode == ISD::AND) && in hoistLogicOpWithSameOpcodeHands()
5835 return DAG.getNode(HandOpcode, DL, VT, Logic, N0.getOperand(1)); in hoistLogicOpWithSameOpcodeHands()
5839 if (HandOpcode == ISD::BSWAP) { in hoistLogicOpWithSameOpcodeHands()
5844 return DAG.getNode(HandOpcode, DL, VT, Logic); in hoistLogicOpWithSameOpcodeHands()
5850 if ((HandOpcode == ISD::FSHL || HandOpcode == ISD::FSHR) && in hoistLogicOpWithSameOpcodeHands()
5859 return DAG.getNode(HandOpcode, DL, VT, Logic0, Logic1, S); in hoistLogicOpWithSameOpcodeHands()
5869 if ((HandOpcode == ISD::BITCAST || HandOpcode == ISD::SCALAR_TO_VECTOR) && in hoistLogicOpWithSameOpcodeHands()
5876 return DAG.getNode(HandOpcode, DL, VT, Logic); in hoistLogicOpWithSameOpcodeHands()
5892 if (HandOpcode == ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDAG) { in hoistLogicOpWithSameOpcodeHands()