Lines Matching refs:FNEG
2025 case ISD::FNEG: return visitFNEG(N); in visit()
11252 return DAG.getNode(ISD::FNEG, DL, VT, Combined); in combineMinNumMaxNum()
15078 FPOpcode = ISD::FNEG; in foldBitcastedFPLogic()
15114 return DAG.getNode(ISD::FNEG, SDLoc(N), VT, FPOp); in foldBitcastedFPLogic()
15219 if (((N0.getOpcode() == ISD::FNEG && !TLI.isFNegFree(N0.getValueType())) || in visitBITCAST()
15232 if (N0.getOpcode() == ISD::FNEG) { in visitBITCAST()
15251 if (N0.getOpcode() == ISD::FNEG) in visitBITCAST()
15851 matcher.getNode(ISD::FNEG, SL, VT, Z)); in visitFSUBForFMACombine()
15862 matcher.getNode(ISD::FNEG, SL, VT, YZ.getOperand(0)), in visitFSUBForFMACombine()
15888 if (matcher.match(N0, ISD::FNEG) && isContractableFMUL(N0.getOperand(0)) && in visitFSUBForFMACombine()
15893 matcher.getNode(ISD::FNEG, SL, VT, N00), N01, in visitFSUBForFMACombine()
15894 matcher.getNode(ISD::FNEG, SL, VT, N1)); in visitFSUBForFMACombine()
15910 matcher.getNode(ISD::FNEG, SL, VT, N1)); in visitFSUBForFMACombine()
15925 ISD::FNEG, SL, VT, in visitFSUBForFMACombine()
15939 if (matcher.match(N00, ISD::FNEG)) { in visitFSUBForFMACombine()
15945 ISD::FNEG, SL, VT, in visitFSUBForFMACombine()
15961 if (matcher.match(N0, ISD::FNEG)) { in visitFSUBForFMACombine()
15969 ISD::FNEG, SL, VT, in visitFSUBForFMACombine()
16005 matcher.getNode(ISD::FNEG, SL, VT, N1))); in visitFSUBForFMACombine()
16017 matcher.getNode(ISD::FNEG, SL, VT, N1.getOperand(0)), in visitFSUBForFMACombine()
16020 matcher.getNode(ISD::FNEG, SL, VT, N20), N21, N0)); in visitFSUBForFMACombine()
16038 matcher.getNode(ISD::FNEG, SL, VT, N1))); in visitFSUBForFMACombine()
16064 matcher.getNode(ISD::FNEG, SL, VT, N1))); in visitFSUBForFMACombine()
16081 matcher.getNode(ISD::FNEG, SL, VT, N1.getOperand(0)), in visitFSUBForFMACombine()
16085 matcher.getNode(ISD::FNEG, SL, VT, in visitFSUBForFMACombine()
16109 matcher.getNode(ISD::FNEG, SL, VT, in visitFSUBForFMACombine()
16114 matcher.getNode(ISD::FNEG, SL, VT, in visitFSUBForFMACombine()
16172 DAG.getNode(ISD::FNEG, SL, VT, Y)); in visitFMULForFMADistributiveCombine()
16192 DAG.getNode(ISD::FNEG, SL, VT, X.getOperand(1)), Y, in visitFMULForFMADistributiveCombine()
16196 DAG.getNode(ISD::FNEG, SL, VT, X.getOperand(1)), Y, in visitFMULForFMADistributiveCombine()
16197 DAG.getNode(ISD::FNEG, SL, VT, Y)); in visitFMULForFMADistributiveCombine()
16202 DAG.getNode(ISD::FNEG, SL, VT, Y)); in visitFMULForFMADistributiveCombine()
16306 if (N0.getOpcode() == ISD::FNEG && N0.getOperand(0) == N1) in visitFADD()
16310 if (N1.getOpcode() == ISD::FNEG && N1.getOperand(0) == N0) in visitFADD()
16504 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT)) in visitFSUB()
16505 return DAG.getNode(ISD::FNEG, DL, VT, N1); in visitFSUB()
16515 return DAG.getNode(ISD::FNEG, DL, VT, N1->getOperand(1)); in visitFSUB()
16518 return DAG.getNode(ISD::FNEG, DL, VT, N1->getOperand(0)); in visitFSUB()
16764 TLI.isOperationLegal(ISD::FNEG, VT)) in visitFMUL()
16765 return DAG.getNode(ISD::FNEG, DL, VT, in visitFMUL()
16874 (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))) { in visitFMA()
16875 SDValue RHSNeg = matcher.getNode(ISD::FNEG, DL, VT, N0); in visitFMA()
16881 if (matcher.match(N0, ISD::FNEG) && in visitFMA()
16886 matcher.getNode(ISD::FNEG, DL, VT, N1), N2); in visitFMA()
16900 if (N1CFP && matcher.match(N2, ISD::FNEG) && N2.getOperand(0) == N0) { in visitFMA()
16912 return matcher.getNode(ISD::FNEG, DL, VT, Neg); in visitFMA()
17246 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT)) in visitFCOPYSIGN()
17247 return DAG.getNode(ISD::FNEG, SDLoc(N), VT, in visitFCOPYSIGN()
17255 if (N0.getOpcode() == ISD::FABS || N0.getOpcode() == ISD::FNEG || in visitFCOPYSIGN()
17744 return DAG.getNode(ISD::FNEG, SDLoc(N), VT, N0); in visitFNEG()
17839 if (N0.getOpcode() == ISD::FNEG || N0.getOpcode() == ISD::FCOPYSIGN) in visitFABS()