844   MachineInstr *DefMI = LIS->getInstructionFromIndex(AValNo->def);  in removeCopyByCommutingDef()  local
845   if (!DefMI)  in removeCopyByCommutingDef()
847   if (!DefMI->isCommutable())  in removeCopyByCommutingDef()
851   int DefIdx = DefMI->findRegisterDefOperandIdx(IntA.reg());  in removeCopyByCommutingDef()
854   if (!DefMI->isRegTiedToUseOperand(DefIdx, &UseOpIdx))  in removeCopyByCommutingDef()
867   if (!TII->findCommutedOpIndices(*DefMI, UseOpIdx, NewDstIdx))  in removeCopyByCommutingDef()
870   MachineOperand &NewDstMO = DefMI->getOperand(NewDstIdx);  in removeCopyByCommutingDef()
895                     << *DefMI);  in removeCopyByCommutingDef()
899   MachineBasicBlock *MBB = DefMI->getParent();  in removeCopyByCommutingDef()
901       TII->commuteInstruction(*DefMI, false, UseOpIdx, NewDstIdx);  in removeCopyByCommutingDef()
907   if (NewMI != DefMI) {  in removeCopyByCommutingDef()
908     LIS->ReplaceMachineInstrInMaps(*DefMI, *NewMI);  in removeCopyByCommutingDef()
909     MachineBasicBlock::iterator Pos = DefMI;  in removeCopyByCommutingDef()
911     MBB->erase(DefMI);  in removeCopyByCommutingDef()
1124     MachineInstr *DefMI = LIS->getInstructionFromIndex(PVal->def);  in removePartialRedundancy()  local
1125     if (!DefMI || !DefMI->isFullCopy()) {  in removePartialRedundancy()
1130     if (DefMI->getOperand(0).getReg() != IntA.reg() ||  in removePartialRedundancy()
1131         DefMI->getOperand(1).getReg() != IntB.reg() ||  in removePartialRedundancy()
1132         DefMI->getParent() != Pred) {  in removePartialRedundancy()
1304   MachineInstr *DefMI = LIS->getInstructionFromIndex(ValNo->def);  in reMaterializeTrivialDef()  local
1305   if (!DefMI)  in reMaterializeTrivialDef()
1307   if (DefMI->isCopyLike()) {  in reMaterializeTrivialDef()
1311   if (!TII->isAsCheapAsAMove(*DefMI))  in reMaterializeTrivialDef()
1316   if (!Edit.checkRematerializable(ValNo, DefMI))  in reMaterializeTrivialDef()
1319   if (!definesFullReg(*DefMI, SrcReg))  in reMaterializeTrivialDef()
1322   if (!DefMI->isSafeToMove(AA, SawStore))  in reMaterializeTrivialDef()
1324   const MCInstrDesc &MCID = DefMI->getDesc();  in reMaterializeTrivialDef()
1341   [[maybe_unused]] const unsigned DefSubIdx = DefMI->getOperand(0).getSubReg();  in reMaterializeTrivialDef()
1343   if (!DefMI->isImplicitDef()) {  in reMaterializeTrivialDef()
1348                                               DefMI->getOperand(0).getSubReg());  in reMaterializeTrivialDef()
1365   RM.OrigMI = DefMI;  in reMaterializeTrivialDef()
2536   LaneBitmask computeWriteLanes(const MachineInstr *DefMI, bool &Redef) const;
2649 LaneBitmask JoinVals::computeWriteLanes(const MachineInstr *DefMI, bool &Redef)  in computeWriteLanes()  argument
2652   for (const MachineOperand &MO : DefMI->all_defs()) {  in computeWriteLanes()
2751   const MachineInstr *DefMI = nullptr;  in analyzeValue()  local
2758     DefMI = Indexes->getInstructionFromIndex(VNI->def);  in analyzeValue()
2759     assert(DefMI != nullptr);  in analyzeValue()
2763       if (DefMI->isImplicitDef()) {  in analyzeValue()
2769       V.ValidLanes = V.WriteLanes = computeWriteLanes(DefMI, Redef);  in analyzeValue()
2797       if (DefMI->isImplicitDef()) {  in analyzeValue()
2876     if (DefMI &&  in analyzeValue()
2877         (DefMI->getParent() != OtherMBB || LIS->isLiveInToMBB(LR, OtherMBB))) {  in analyzeValue()
2880                  << printMBBReference(*DefMI->getParent())  in analyzeValue()
2904   if (DefMI->isImplicitDef())  in analyzeValue()
2909   if (CP.isCoalescable(DefMI)) {  in analyzeValue()
2926   if (DefMI->isFullCopy() && !CP.isPartial() &&  in analyzeValue()