Lines Matching refs:RegClassInfo

329                             (2 * RegClassInfo.getNumAllocatableRegs(&RC)));  in getPriority()
466        AllocationOrder::create(VirtReg.reg(), *VRM, RegClassInfo, Matrix)) {  in canReassign()
525   MCRegister CSR = RegClassInfo.getLastCalleeSavedAlias(PhysReg);  in isUnusedCalleeSavedReg()
541     uint8_t MinCost = RegClassInfo.getMinCost(RC);  in getOrderLimit()
551       OrderLimit = RegClassInfo.getLastCostChange(RC);  in getOrderLimit()
568                << printReg(RegClassInfo.getLastCalleeSavedAlias(PhysReg), TRI)  in canAllocatePhysReg()
937   bool SingleInstrs = RegClassInfo.isProperSubClass(MRI->getRegClass(Reg));  in splitAroundRegion()
1300   bool SingleInstrs = RegClassInfo.isProperSubClass(MRI->getRegClass(Reg));  in tryBlockSplit()
1423   if (!RegClassInfo.isProperSubClass(CurRC)) {  in tryInstructionSplit()
1444       RegClassInfo.getNumAllocatableRegs(SuperRC);  in tryInstructionSplit()
1455                                                    TII, TRI, RegClassInfo)) ||  in tryInstructionSplit()
2418       AllocationOrder::create(VirtReg.reg(), *VRM, RegClassInfo, Matrix);  in selectOrSplitImpl()