400                                AllocationOrder &Order,  in tryAssign()  argument
404   for (auto I = Order.begin(), E = Order.end(); I != E && !PhysReg; ++I) {  in tryAssign()
421     if (Order.isHint(Hint)) {  in tryAssign()
432       if (trySplitAroundHintReg(PhysHint, VirtReg, NewVRegs, Order))  in tryAssign()
449   MCRegister CheapReg = tryEvict(VirtReg, Order, NewVRegs, Cost, FixedRegisters);  in tryAssign()
534                                        const AllocationOrder &Order,  in getOrderLimit()  argument
536   unsigned OrderLimit = Order.getOrder().size();  in getOrderLimit()
550     if (RegCosts[Order.getOrder().back()] >= CostPerUseLimit) {  in getOrderLimit()
580                               AllocationOrder &Order,  in tryEvict()  argument
588       VirtReg, Order, CostPerUseLimit, FixedRegisters);  in tryEvict()
871                                              const AllocationOrder &Order) {  in calcGlobalSplitCost()  argument
1063                                     AllocationOrder &Order,  in tryRegionSplit()  argument
1085   unsigned BestCand = calculateRegionSplitCost(VirtReg, Order, BestCost,  in tryRegionSplit()
1097                                             AllocationOrder &Order,  in calculateRegionSplitCostAroundReg()  argument
1157   Cost += calcGlobalSplitCost(Cand, Order);  in calculateRegionSplitCostAroundReg()
1174                                             AllocationOrder &Order,  in calculateRegionSplitCost()  argument
1179   for (MCPhysReg PhysReg : Order) {  in calculateRegionSplitCost()
1184     calculateRegionSplitCostAroundReg(PhysReg, Order, BestCost, NumCands,  in calculateRegionSplitCost()
1236                                      AllocationOrder &Order) {  in trySplitAroundHintReg()  argument
1280   calculateRegionSplitCostAroundReg(Hint, Order, Cost, NumCands, BestCand);  in trySplitAroundHintReg()
1296                                  AllocationOrder &Order,  in tryBlockSplit()  argument
1417                                        AllocationOrder &Order,  in tryInstructionSplit()  argument
1570                                  AllocationOrder &Order,  in tryLocalSplit()  argument
1659   for (MCPhysReg PhysReg : Order) {  in tryLocalSplit()
1800 unsigned RAGreedy::trySplit(const LiveInterval &VirtReg, AllocationOrder &Order,  in trySplit()  argument
1812     Register PhysReg = tryLocalSplit(VirtReg, Order, NewVRegs);  in trySplit()
1815     return tryInstructionSplit(VirtReg, Order, NewVRegs);  in trySplit()
1827     MCRegister PhysReg = tryRegionSplit(VirtReg, Order, NewVRegs);  in trySplit()
1833   return tryBlockSplit(VirtReg, Order, NewVRegs);  in trySplit()
1957                                            AllocationOrder &Order,  in tryLastChanceRecoloring()  argument
1991   for (MCRegister PhysReg : Order) {  in tryLastChanceRecoloring()
2177     const LiveInterval &VirtReg, AllocationOrder &Order, MCRegister PhysReg,  in tryAssignCSRFirstTime()  argument
2197     unsigned BestCand = calculateRegionSplitCost(VirtReg, Order, BestCost,  in tryAssignCSRFirstTime()
2417   auto Order =  in selectOrSplitImpl()  local
2420           tryAssign(VirtReg, Order, NewVRegs, FixedRegisters)) {  in selectOrSplitImpl()
2426       MCRegister CSRReg = tryAssignCSRFirstTime(VirtReg, Order, PhysReg,  in selectOrSplitImpl()
2448             tryEvict(VirtReg, Order, NewVRegs, CostPerUseLimit,  in selectOrSplitImpl()
2476     Register PhysReg = trySplit(VirtReg, Order, NewVRegs, FixedRegisters);  in selectOrSplitImpl()
2484     return tryLastChanceRecoloring(VirtReg, Order, NewVRegs, FixedRegisters,  in selectOrSplitImpl()