Lines Matching refs:getSubReg

971   unsigned SubRegIdx = MO.getSubReg();  in allocVirtRegUndef()
973     PhysReg = TRI->getSubReg(PhysReg, SubRegIdx);  in allocVirtRegUndef()
1005     if (MO.getSubReg() && !MO.isUndef()) {  in defineLiveThroughVirtReg()
1122     if (MI.isCopy() && MI.getOperand(1).getSubReg() == 0) {  in useVirtReg()
1155   if (!MO.getSubReg()) {  in setPhysReg()
1162   MO.setReg(PhysReg ? TRI->getSubReg(PhysReg, MO.getSubReg()) : MCRegister());  in setPhysReg()
1322                         (MO0.getSubReg() == 0 && !MO0.isUndef());  in findAndSortDefOperandIndexes()
1324                         (MO1.getSubReg() == 0 && !MO1.isUndef());  in findAndSortDefOperandIndexes()
1383           if (isTiedToNotUndef(MO) || (MO.getSubReg() != 0 && !MO.isUndef()))  in allocateInstruction()
1430                 (MO.getSubReg() && !MO.isUndef())) {  in allocateInstruction()
1471       if (Reg.isPhysical() && MO.getSubReg() != 0) {  in allocateInstruction()
1576       assert(!MO.getSubReg() && "should be already handled in def processing");  in allocateInstruction()