Lines Matching refs:LRI

706       LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);  in displacePhysReg()  local
707 assert(LRI != LiveVirtRegs.end() && "datastructures in sync"); in displacePhysReg()
710 reload(ReloadBefore, VirtReg, LRI->PhysReg); in displacePhysReg()
712 setPhysRegState(LRI->PhysReg, regFree); in displacePhysReg()
713 LRI->PhysReg = 0; in displacePhysReg()
714 LRI->Reloaded = true; in displacePhysReg()
742 LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg); in freePhysReg() local
743 assert(LRI != LiveVirtRegs.end()); in freePhysReg()
744 LLVM_DEBUG(dbgs() << ' ' << printReg(LRI->VirtReg, TRI) << '\n'); in freePhysReg()
745 setPhysRegState(LRI->PhysReg, regFree); in freePhysReg()
746 LRI->PhysReg = 0; in freePhysReg()
960 LiveRegMap::const_iterator LRI = findLiveVirtReg(VirtReg); in allocVirtRegUndef() local
962 if (LRI != LiveVirtRegs.end() && LRI->PhysReg) { in allocVirtRegUndef()
963 PhysReg = LRI->PhysReg; in allocVirtRegUndef()
987 LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg); in defineLiveThroughVirtReg() local
988 if (LRI != LiveVirtRegs.end()) { in defineLiveThroughVirtReg()
989 MCPhysReg PrevReg = LRI->PhysReg; in defineLiveThroughVirtReg()
994 LRI->PhysReg = 0; in defineLiveThroughVirtReg()
995 allocVirtReg(MI, *LRI, 0, true); in defineLiveThroughVirtReg()
998 LLVM_DEBUG(dbgs() << "Copy " << printReg(LRI->PhysReg, TRI) << " to " in defineLiveThroughVirtReg()
1002 .addReg(LRI->PhysReg, llvm::RegState::Kill); in defineLiveThroughVirtReg()
1006 LRI->LastUse = &MI; in defineLiveThroughVirtReg()
1025 LiveRegMap::iterator LRI; in defineVirtReg() local
1027 std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg)); in defineVirtReg()
1031 LRI->LiveOut = true; in defineVirtReg()
1038 if (LRI->PhysReg == 0) { in defineVirtReg()
1039 allocVirtReg(MI, *LRI, 0, LookAtPhysRegUses); in defineVirtReg()
1042 if (LRI->Error) { in defineVirtReg()
1050 assert(!isRegUsedInInstr(LRI->PhysReg, LookAtPhysRegUses) && in defineVirtReg()
1054 << printReg(LRI->PhysReg, TRI) << '\n'); in defineVirtReg()
1057 MCPhysReg PhysReg = LRI->PhysReg; in defineVirtReg()
1058 if (LRI->Reloaded || LRI->LiveOut) { in defineVirtReg()
1062 LLVM_DEBUG(dbgs() << "Spill Reason: LO: " << LRI->LiveOut in defineVirtReg()
1063 << " RL: " << LRI->Reloaded << '\n'); in defineVirtReg()
1064 bool Kill = LRI->LastUse == nullptr; in defineVirtReg()
1065 spill(SpillBefore, VirtReg, PhysReg, Kill, LRI->LiveOut); in defineVirtReg()
1083 LRI->LastUse = nullptr; in defineVirtReg()
1085 LRI->LiveOut = false; in defineVirtReg()
1086 LRI->Reloaded = false; in defineVirtReg()
1102 LiveRegMap::iterator LRI; in useVirtReg() local
1104 std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg)); in useVirtReg()
1108 LRI->LiveOut = true; in useVirtReg()
1115 assert((!MO.isKill() || LRI->LastUse == &MI) && "Invalid kill flag"); in useVirtReg()
1119 if (LRI->PhysReg == 0) { in useVirtReg()
1132 allocVirtReg(MI, *LRI, Hint, false); in useVirtReg()
1133 if (LRI->Error) { in useVirtReg()
1142 LRI->LastUse = &MI; in useVirtReg()
1145 BundleVirtRegsMap[VirtReg] = LRI->PhysReg; in useVirtReg()
1147 markRegUsedInInstr(LRI->PhysReg); in useVirtReg()
1148 return setPhysReg(MI, MO, LRI->PhysReg); in useVirtReg()
1632 LiveRegMap::iterator LRI = findLiveVirtReg(Reg); in handleDebugValue() local
1637 if (LRI != LiveVirtRegs.end() && LRI->PhysReg) { in handleDebugValue()
1640 setPhysReg(MI, *RegMO, LRI->PhysReg); in handleDebugValue()