Lines Matching refs:UseMI
82 MachineInstr *UseMI = UseOp.getParent(); in expand() local
83 int UseStage = Schedule.getStage(UseMI); in expand()
1147 MachineInstr *UseMI = UseOp.getParent(); in rewriteScheduledInstr() local
1148 if (UseMI->getParent() != BB) in rewriteScheduledInstr()
1150 if (UseMI->isPHI()) { in rewriteScheduledInstr()
1151 if (!Phi->isPHI() && UseMI->getOperand(0).getReg() == NewReg) in rewriteScheduledInstr()
1153 if (getLoopPhiReg(*UseMI, BB) != OldReg) in rewriteScheduledInstr()
1156 InstrMapTy::iterator OrigInstr = InstrMap.find(UseMI); in rewriteScheduledInstr()
1188 BuildMI(*BB, UseMI, UseMI->getDebugLoc(), TII->get(TargetOpcode::COPY), in rewriteScheduledInstr()
1618 for (MachineInstr &UseMI : MRI.use_instructions(DefMO.getReg())) { in filterInstructions()
1621 assert(UseMI.isPHI()); in filterInstructions()
1622 Register Reg = getEquivalentRegisterIn(UseMI.getOperand(0).getReg(), in filterInstructions()
1624 Subs.emplace_back(&UseMI, Reg); in filterInstructions()
1932 for (MachineInstr &UseMI : MRI.use_instructions(DefMO.getReg())) { in rewriteUsesOf()
1935 assert(UseMI.isPHI()); in rewriteUsesOf()
1936 Register Reg = getEquivalentRegisterIn(UseMI.getOperand(0).getReg(), in rewriteUsesOf()
1938 Subs.emplace_back(&UseMI, Reg); in rewriteUsesOf()