Lines Matching refs:Schedule

68   BB = Schedule.getLoop()->getTopBlock();  in expand()
75 for (MachineInstr *MI : Schedule.getInstructions()) { in expand()
76 int DefStage = Schedule.getStage(MI); in expand()
83 int UseStage = Schedule.getStage(UseMI); in expand()
109 unsigned MaxStageCount = Schedule.getNumStages() - 1; in generatePipelinedLoop()
132 for (MachineInstr *CI : Schedule.getInstructions()) { in generatePipelinedLoop()
135 unsigned StageNum = Schedule.getStage(CI); in generatePipelinedLoop()
216 if (Schedule.getStage(&*BBI) == StageNum) { in generateProlog()
293 if ((unsigned)Schedule.getStage(In) == StageNum) { in generateEpilog()
396 int StageScheduled = Schedule.getStage(&*BBI); in generateExistingPhis()
397 int LoopValStage = Schedule.getStage(MRI.getVRegDef(LoopVal)); in generateExistingPhis()
451 int PhiStage = Schedule.getStage(InstOp1); in generateExistingPhis()
457 int PhiOpStage = Schedule.getStage(InstOp1); in generateExistingPhis()
627 int StageScheduled = Schedule.getStage(&*BBI); in generatePhis()
1013 if (Schedule.getStage(LoopDef) > (signed)InstStageNum) in cloneAndChangeInstr()
1043 int DefStageNum = Schedule.getStage(Def); in updateInstruction()
1118 unsigned PhiStage = (unsigned)Schedule.getStage(MRI.getVRegDef(PhiDef)); in rewritePhiValues()
1119 unsigned LoopStage = (unsigned)Schedule.getStage(MRI.getVRegDef(LoopVal)); in rewritePhiValues()
1141 bool InProlog = (CurStageNum < (unsigned)Schedule.getNumStages() - 1); in rewriteScheduledInstr()
1142 int StagePhi = Schedule.getStage(Phi) + PhiNum; in rewriteScheduledInstr()
1159 int StageSched = Schedule.getStage(OrigMI); in rewriteScheduledInstr()
1160 int CycleSched = Schedule.getCycle(OrigMI); in rewriteScheduledInstr()
1164 int CyclePhi = Schedule.getCycle(Phi); in rewriteScheduledInstr()
1200 int DefCycle = Schedule.getCycle(&Phi); in isLoopCarried()
1201 int DefStage = Schedule.getStage(&Phi); in isLoopCarried()
1209 int LoopCycle = Schedule.getCycle(Use); in isLoopCarried()
1210 int LoopStage = Schedule.getStage(Use); in isLoopCarried()
1739 BitVector LS(Schedule.getNumStages(), true); in peelPrologAndEpilogs()
1740 BitVector AS(Schedule.getNumStages(), true); in peelPrologAndEpilogs()
1746 for (int I = 0; I < Schedule.getNumStages() - 1; ++I) { in peelPrologAndEpilogs()
1777 for (int I = 1; I <= Schedule.getNumStages() - 1; ++I) { in peelPrologAndEpilogs()
1780 filterInstructions(B, Schedule.getNumStages() - I); in peelPrologAndEpilogs()
1785 PhiNodeLoopIteration[&Phi] = Schedule.getNumStages() - I; in peelPrologAndEpilogs()
1791 unsigned Stage = Schedule.getNumStages() - 1 + I - J; in peelPrologAndEpilogs()
1952 int TC = Schedule.getNumStages() - 1; in fixupBranches()
1989 LoopInfo->adjustTripCount(-(Schedule.getNumStages() - 1)); in fixupBranches()
1997 KernelRewriter KR(*Schedule.getLoop(), Schedule, BB); in rewriteKernel()
2002 BB = Schedule.getLoop()->getTopBlock(); in expand()
2003 Preheader = Schedule.getLoop()->getLoopPreheader(); in expand()
2004 LLVM_DEBUG(Schedule.dump()); in expand()
2014 BB = Schedule.getLoop()->getTopBlock(); in validateAgainstModuloScheduleExpander()
2015 Preheader = Schedule.getLoop()->getLoopPreheader(); in validateAgainstModuloScheduleExpander()
2021 Schedule.print(OS); in validateAgainstModuloScheduleExpander()
2027 ModuloScheduleExpander MSE(MF, Schedule, *LIS, in validateAgainstModuloScheduleExpander()
2040 KernelRewriter KR(*Schedule.getLoop(), Schedule, BB); in validateAgainstModuloScheduleExpander()