Lines Matching refs:MONum
239 void visitMachineOperand(const MachineOperand *MO, unsigned MONum);
247 void report(const char *msg, const MachineOperand *MO, unsigned MONum,
265 void checkLiveness(const MachineOperand *MO, unsigned MONum);
266 void checkLivenessAtUse(const MachineOperand *MO, unsigned MONum,
270 void checkLivenessAtDef(const MachineOperand *MO, unsigned MONum,
539 unsigned MONum, LLT MOVRegType) { in report() argument
542 errs() << "- operand " << MONum << ": "; in report()
2093 MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { in visitMachineOperand() argument
2098 NumDefs = (MONum == 0 && MO->isReg()) ? NumDefs : 0; in visitMachineOperand()
2101 if (MONum < NumDefs) { in visitMachineOperand()
2102 const MCOperandInfo &MCOI = MCID.operands()[MONum]; in visitMachineOperand()
2104 report("Explicit definition must be a register", MO, MONum); in visitMachineOperand()
2106 report("Explicit definition marked as use", MO, MONum); in visitMachineOperand()
2108 report("Explicit definition marked as implicit", MO, MONum); in visitMachineOperand()
2109 } else if (MONum < MCID.getNumOperands()) { in visitMachineOperand()
2110 const MCOperandInfo &MCOI = MCID.operands()[MONum]; in visitMachineOperand()
2113 bool IsOptional = MI->isVariadic() && MONum == MCID.getNumOperands() - 1; in visitMachineOperand()
2117 report("Explicit operand marked as def", MO, MONum); in visitMachineOperand()
2119 report("Explicit operand marked as implicit", MO, MONum); in visitMachineOperand()
2125 report("Expected a register operand.", MO, MONum); in visitMachineOperand()
2130 report("Expected a non-register operand.", MO, MONum); in visitMachineOperand()
2134 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO); in visitMachineOperand()
2137 report("Tied use must be a register", MO, MONum); in visitMachineOperand()
2139 report("Operand should be tied", MO, MONum); in visitMachineOperand()
2140 else if (unsigned(TiedTo) != MI->findTiedOperandIdx(MONum)) in visitMachineOperand()
2141 report("Tied def doesn't match MCInstrDesc", MO, MONum); in visitMachineOperand()
2151 report("Explicit operand should not be tied", MO, MONum); in visitMachineOperand()
2155 report("Extra explicit operand on non-variadic instruction", MO, MONum); in visitMachineOperand()
2164 report("Register operand must be marked debug", MO, MONum); in visitMachineOperand()
2166 report("Register operand must not be marked debug", MO, MONum); in visitMachineOperand()
2173 checkLiveness(MO, MONum); in visitMachineOperand()
2177 report("Undef virtual register def operands require a subregister", MO, MONum); in visitMachineOperand()
2181 unsigned OtherIdx = MI->findTiedOperandIdx(MONum); in visitMachineOperand()
2184 report("Must be tied to a register", MO, MONum); in visitMachineOperand()
2186 report("Missing tie flags on tied operand", MO, MONum); in visitMachineOperand()
2187 if (MI->findTiedOperandIdx(OtherIdx) != MONum) in visitMachineOperand()
2188 report("Inconsistent tie links", MO, MONum); in visitMachineOperand()
2189 if (MONum < MCID.getNumDefs()) { in visitMachineOperand()
2193 MO, MONum); in visitMachineOperand()
2196 report("Explicit def should be tied to implicit use", MO, MONum); in visitMachineOperand()
2211 MO->isUse() && MI->isRegTiedToDefOperand(MONum, &DefIdx) && in visitMachineOperand()
2213 report("Two-address instruction operands must be identical", MO, MONum); in visitMachineOperand()
2220 report("Illegal subregister index for physical register", MO, MONum); in visitMachineOperand()
2223 if (MONum < MCID.getNumOperands()) { in visitMachineOperand()
2225 TII->getRegClass(MCID, MONum, TRI, *MF)) { in visitMachineOperand()
2227 report("Illegal physical register for instruction", MO, MONum); in visitMachineOperand()
2235 report("isRenamable set on reserved register", MO, MONum); in visitMachineOperand()
2252 report("Generic virtual register use cannot be undef", MO, MONum); in visitMachineOperand()
2264 MO, MONum); in visitMachineOperand()
2272 MONum); in visitMachineOperand()
2283 MO, MONum); in visitMachineOperand()
2291 MONum); in visitMachineOperand()
2301 MONum); in visitMachineOperand()
2309 MONum < MCID.getNumOperands() && in visitMachineOperand()
2310 TII->getRegClass(MCID, MONum, TRI, *MF)) { in visitMachineOperand()
2312 MONum); in visitMachineOperand()
2315 TII->getRegClass(MCID, MONum, TRI, *MF)) in visitMachineOperand()
2326 report("Invalid subregister index for virtual register", MO, MONum); in visitMachineOperand()
2332 report("Invalid register class for subregister index", MO, MONum); in visitMachineOperand()
2338 if (MONum < MCID.getNumOperands()) { in visitMachineOperand()
2340 TII->getRegClass(MCID, MONum, TRI, *MF)) { in visitMachineOperand()
2345 report("No largest legal super class exists.", MO, MONum); in visitMachineOperand()
2350 report("No matching super-reg register class.", MO, MONum); in visitMachineOperand()
2355 report("Illegal virtual register for instruction", MO, MONum); in visitMachineOperand()
2372 report("PHI operand is not in the CFG", MO, MONum); in visitMachineOperand()
2406 report("Instruction loads from dead spill slot", MO, MONum); in visitMachineOperand()
2410 report("Instruction stores to dead spill slot", MO, MONum); in visitMachineOperand()
2418 report("CFI instruction has invalid index", MO, MONum); in visitMachineOperand()
2427 unsigned MONum, SlotIndex UseIdx, in checkLivenessAtUse() argument
2437 report("No live segment at use", MO, MONum); in checkLivenessAtUse()
2443 report("Live range continues after kill flag", MO, MONum); in checkLivenessAtUse()
2453 unsigned MONum, SlotIndex DefIdx, in checkLivenessAtDef() argument
2471 report("Inconsistent valno->def", MO, MONum); in checkLivenessAtDef()
2480 report("No live segment at def", MO, MONum); in checkLivenessAtDef()
2498 report("Live range continues after dead def flag", MO, MONum); in checkLivenessAtDef()
2508 void MachineVerifier::checkLiveness(const MachineOperand *MO, unsigned MONum) { in checkLiveness() argument
2519 report("Live interval for subreg operand has no subranges", MO, MONum); in checkLiveness()
2521 report("Virtual register has no live interval", MO, MONum); in checkLiveness()
2537 report("Kill missing from LiveVariables", MO, MONum); in checkLiveness()
2546 MI->getOperand(MONum + 1).getMBB()).getPrevSlot(); in checkLiveness()
2556 checkLivenessAtUse(MO, MONum, UseIdx, *LR, Unit); in checkLiveness()
2562 checkLivenessAtUse(MO, MONum, UseIdx, *LI, Reg); in checkLiveness()
2572 checkLivenessAtUse(MO, MONum, UseIdx, SR, Reg, SR.LaneMask); in checkLiveness()
2579 report("No live subrange at use", MO, MONum); in checkLiveness()
2585 report("Not all lanes of PHI source live at use", MO, MONum); in checkLiveness()
2625 report("Using an undefined physical register", MO, MONum); in checkLiveness()
2627 report("Reading virtual register without a def", MO, MONum); in checkLiveness()
2634 report("Using a killed virtual register", MO, MONum); in checkLiveness()
2652 report("Multiple virtual register defs in SSA form", MO, MONum); in checkLiveness()
2660 checkLivenessAtDef(MO, MONum, DefIdx, *LI, Reg); in checkLiveness()
2669 checkLivenessAtDef(MO, MONum, DefIdx, SR, Reg, true, SR.LaneMask); in checkLiveness()