Lines Matching refs:isTop

2301   unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle);  in getLatencyStallCycles()
2313 if (isTop()) in getNextResourceCycleByInstance()
2326 if (!isTop()) in getNextResourceCycleByInstance()
2430 ((isTop() && SchedModel->mustBeginGroup(SU->getInstr())) || in checkHazard()
2431 (!isTop() && SchedModel->mustEndGroup(SU->getInstr())))) { in checkHazard()
2433 << (isTop() ? "begin" : "end") << " group\n"); in checkHazard()
2569 if (isTop()) in bumpCycle()
2640 if (!isTop() && SU->isCall) { in bumpNode()
2657 unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle); in bumpNode()
2726 if (isTop()) { in bumpNode()
2742 if (isTop()) { in bumpNode()
2753 unsigned &TopLatency = isTop() ? ExpectedLatency : DependentLatency; in bumpNode()
2754 unsigned &BotLatency = isTop() ? DependentLatency : ExpectedLatency; in bumpNode()
2785 if ((isTop() && SchedModel->mustEndGroup(SU->getInstr())) || in bumpNode()
2786 (!isTop() && SchedModel->mustBeginGroup(SU->getInstr()))) { in bumpNode()
2787 LLVM_DEBUG(dbgs() << " Bump cycle to " << (isTop() ? "end" : "begin") in bumpNode()
2811 unsigned ReadyCycle = isTop() ? SU->TopReadyCycle : SU->BotReadyCycle; in releasePending()
3167 if (Zone.isTop()) { in tryLatency()
3396 unsigned getWeakLeft(const SUnit *SU, bool isTop) { in getWeakLeft() argument
3397 return (isTop) ? SU->WeakPredsLeft : SU->WeakSuccsLeft; in getWeakLeft()
3407 int biasPhysReg(const SUnit *SU, bool isTop) { in biasPhysReg() argument
3411 unsigned ScheduledOper = isTop ? 1 : 0; in biasPhysReg()
3412 unsigned UnscheduledOper = isTop ? 0 : 1; in biasPhysReg()
3419 bool AtBoundary = isTop ? !SU->NumSuccsLeft : !SU->NumPredsLeft; in biasPhysReg()
3437 return isTop ? -1 : 1; in biasPhysReg()
3588 if ((Zone->isTop() && TryCand.SU->NodeNum < Cand.SU->NodeNum) in tryCandidate()
3589 || (!Zone->isTop() && TryCand.SU->NodeNum > Cand.SU->NodeNum)) { in tryCandidate()
3614 initCandidate(TryCand, SU, Zone.isTop(), RPTracker, TempTracker); in pickNodeFromQueue()
3751 void GenericScheduler::reschedulePhysReg(SUnit *SU, bool isTop) { in reschedulePhysReg() argument
3753 if (!isTop) in reschedulePhysReg()
3755 SmallVectorImpl<SDep> &Deps = isTop ? SU->Preds : SU->Succs; in reschedulePhysReg()
3764 if (isTop ? DepSU->Succs.size() > 1 : DepSU->Preds.size() > 1) in reschedulePhysReg()