Lines Matching refs:Root
100 unsigned getLatency(MachineInstr *Root, MachineInstr *NewRoot,
103 improvesCriticalPathLen(MachineBasicBlock *MBB, MachineInstr *Root,
109 bool reduceRegisterPressure(MachineInstr &Root, MachineBasicBlock *MBB,
125 void verifyPatternOrder(MachineBasicBlock *MBB, MachineInstr &Root,
268 unsigned MachineCombiner::getLatency(MachineInstr *Root, MachineInstr *NewRoot, in getLatency() argument
284 if (UseMO && BlockTrace.isDepInTrace(*Root, *UseMO)) { in getLatency()
353 MachineInstr &Root, MachineBasicBlock *MBB, in reduceRegisterPressure() argument
370 MachineBasicBlock *MBB, MachineInstr *Root, in improvesCriticalPathLen() argument
380 unsigned RootDepth = BlockTrace.getInstrCycles(*Root).Depth; in improvesCriticalPathLen()
382 LLVM_DEBUG(dbgs() << " Dependence data for " << *Root << "\tNewRootDepth: " in improvesCriticalPathLen()
404 if (TII->accumulateInstrSeqToRootLatency(*Root)) { in improvesCriticalPathLen()
406 getLatenciesForInstrSequences(*Root, InsInstrs, DelInstrs, BlockTrace); in improvesCriticalPathLen()
409 RootLatency = TSchedModel.computeInstrLatency(Root); in improvesCriticalPathLen()
412 unsigned RootSlack = BlockTrace.getInstrSlack(*Root); in improvesCriticalPathLen()
541 MachineBasicBlock *MBB, MachineInstr &Root, in verifyPatternOrder() argument
549 TII->genAlternativeCodeSequence(Root, P, InsInstrs, DelInstrs, in verifyPatternOrder()
559 Root, InsInstrs, DelInstrs, TraceEnsemble->getTrace(MBB)); in verifyPatternOrder()