Lines Matching refs:RevCond
1032 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBranches() local
1033 BBI.IsBrReversible = (RevCond.size() == 0) || in AnalyzeBranches()
1034 !TII->reverseBranchCondition(RevCond); in AnalyzeBranches()
1280 RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBlock() local
1281 bool CanRevCond = !TII->reverseBranchCondition(RevCond); in AnalyzeBlock()
1299 bool FalseFeasible = FeasibilityAnalysis(FalseBBI, RevCond, in AnalyzeBlock()
1390 FeasibilityAnalysis(FalseBBI, RevCond, true)) { in AnalyzeBlock()
1401 FeasibilityAnalysis(FalseBBI, RevCond, true, true)) { in AnalyzeBlock()
1411 FeasibilityAnalysis(FalseBBI, RevCond)) { in AnalyzeBlock()
1689 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(), in IfConvertTriangle() local
1691 if (TII->reverseBranchCondition(RevCond)) in IfConvertTriangle()
1707 TII->insertBranch(*BBI.BB, CvtBBI->FalseBB, nullptr, RevCond, dl); in IfConvertTriangle()
1781 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertDiamondCommon() local
1782 if (TII->reverseBranchCondition(RevCond)) in IfConvertDiamondCommon()
1785 SmallVector<MachineOperand, 4> *Cond2 = &RevCond; in IfConvertDiamondCommon()