Lines Matching refs:BrCond
149 SmallVector<MachineOperand, 4> BrCond; member
620 if (!TII->reverseBranchCondition(BBI.BrCond)) { in reverseBranchCondition()
622 TII->insertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl); in reverseBranchCondition()
683 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty()) in ValidTriangle()
890 if (TrueBBI.BrCond.size() == 0 || in ValidForkedDiamond()
891 FalseBBI.BrCond.size() == 0) in ValidForkedDiamond()
1023 BBI.BrCond.clear(); in AnalyzeBranches()
1025 !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond); in AnalyzeBranches()
1029 BBI.BrCond.clear(); in AnalyzeBranches()
1032 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBranches()
1037 if (BBI.BrCond.size()) { in AnalyzeBranches()
1184 if (!hasCommonTail && BBI.BrCond.size()) { in FeasibilityAnalysis()
1190 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in FeasibilityAnalysis()
1239 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) { in AnalyzeBlock()
1280 RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBlock()
1296 bool TrueFeasible = FeasibilityAnalysis(TrueBBI, BBI.BrCond, in AnalyzeBlock()
1345 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) { in AnalyzeBlock()
1361 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) { in AnalyzeBlock()
1370 FeasibilityAnalysis(TrueBBI, BBI.BrCond)) { in AnalyzeBlock()
1524 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertSimple()
1610 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertTriangle()
1689 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(), in IfConvertTriangle()
1690 CvtBBI->BrCond.end()); in IfConvertTriangle()
1781 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertDiamondCommon()
1784 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond; in IfConvertDiamondCommon()
2016 TrueBBI.BrCond, dl); in IfConvertForkedDiamond()