313   MIRBuilder.buildInstr(Opcode, {Res}, {Op0, Op1}, Flags);  in translateBinaryOp()
326   MIRBuilder.buildInstr(Opcode, {Res}, {Op0}, Flags);  in translateUnaryOp()
1570   MIRBuilder.buildInstr(Opcode, {Res}, {Op});  in translateCast()
1710   auto ICall = MIRBuilder.buildInstr(Opcode);  in translateMemFunc()
1780       MIRBuilder.buildInstr(TargetOpcode::LOAD_STACK_GUARD, {DstReg}, {});  in getStackGuard()
1801   MIRBuilder.buildInstr(  in translateOverflowIntrinsic()
1814   MIRBuilder.buildInstr(Op, {Dst}, { Src0, Src1, Scale });  in translateFixedPointIntrinsic()
1946   MIRBuilder.buildInstr(Op, {getOrCreateVReg(CI)}, VRegs,  in translateSimpleIntrinsic()
1994   MIRBuilder.buildInstr(Opcode, {getOrCreateVReg(FPI)}, VRegs, Flags);  in translateConstrainedFPIntrinsic()
2085       MIRBuilder.buildInstr(Op).addFrameIndex(getOrCreateFrameIndex(*AI));  in translateKnownIntrinsic()
2117     MIRBuilder.buildInstr(TargetOpcode::G_VASTART, {}, {getOrCreateVReg(*Ptr)})  in translateKnownIntrinsic()
2270     MIRBuilder.buildInstr(TargetOpcode::G_STACKSAVE, {getOrCreateVReg(CI)}, {});  in translateKnownIntrinsic()
2274     MIRBuilder.buildInstr(TargetOpcode::G_STACKRESTORE, {},  in translateKnownIntrinsic()
2287     MIRBuilder.buildInstr(Opcode, {getOrCreateVReg(CI)},  in translateKnownIntrinsic()
2319         .buildInstr(TargetOpcode::G_READ_REGISTER, {getOrCreateVReg(CI)}, {})  in translateKnownIntrinsic()
2325     MIRBuilder.buildInstr(TargetOpcode::G_WRITE_REGISTER)  in translateKnownIntrinsic()
2370       MIRBuilder.buildInstr(Opc, {Dst}, {ScalarSrc, VecSrc},  in translateKnownIntrinsic()
2385     auto Rdx = MIRBuilder.buildInstr(  in translateKnownIntrinsic()
2387     MIRBuilder.buildInstr(ScalarOpc, {Dst}, {ScalarSrc, Rdx},  in translateKnownIntrinsic()
2421         .buildInstr(TargetOpcode::G_INTRINSIC_FPTRUNC_ROUND,  in translateKnownIntrinsic()
2433         .buildInstr(TargetOpcode::G_IS_FPCLASS, {getOrCreateVReg(CI)},  in translateKnownIntrinsic()
2441     MIRBuilder.buildInstr(TargetOpcode::G_SET_FPENV, {},  in translateKnownIntrinsic()
2446     MIRBuilder.buildInstr(TargetOpcode::G_RESET_FPENV, {}, {});  in translateKnownIntrinsic()
2451     MIRBuilder.buildInstr(TargetOpcode::G_SET_FPMODE, {},  in translateKnownIntrinsic()
2456     MIRBuilder.buildInstr(TargetOpcode::G_RESET_FPMODE, {}, {});  in translateKnownIntrinsic()
2749     MIRBuilder.buildInstr(TargetOpcode::G_INVOKE_REGION_START);  in translateInvoke()
2751     MIRBuilder.buildInstr(TargetOpcode::EH_LABEL).addSym(BeginSymbol);  in translateInvoke()
2763     MIRBuilder.buildInstr(TargetOpcode::EH_LABEL).addSym(EndSymbol);  in translateInvoke()
2827   MIRBuilder.buildInstr(TargetOpcode::EH_LABEL)  in translateLandingPad()
2927   MIRBuilder.buildInstr(TargetOpcode::G_VAARG, {getOrCreateVReg(U)},  in translateVAArg()
3008       .buildInstr(TargetOpcode::G_SHUFFLE_VECTOR, {getOrCreateVReg(U)},  in translateShuffleVector()
3020     auto MIB = MIRBuilder.buildInstr(TargetOpcode::G_PHI, {Reg}, {});  in translatePHI()