Lines Matching refs:encoding
53 reg_info.encoding = eEncodingVector; in LLDB_PLUGIN_DEFINE_ADV()
59 reg_info.encoding = eEncodingIEEE754; in LLDB_PLUGIN_DEFINE_ADV()
63 reg_info.encoding = eEncodingIEEE754; in LLDB_PLUGIN_DEFINE_ADV()
67 reg_info.encoding = eEncodingIEEE754; in LLDB_PLUGIN_DEFINE_ADV()
71 reg_info.encoding = eEncodingUint; in LLDB_PLUGIN_DEFINE_ADV()
892 const ARMEncoding encoding) { in EmulatePUSH() argument
928 switch (encoding) { in EmulatePUSH()
1015 const ARMEncoding encoding) { in EmulatePOP() argument
1044 switch (encoding) { in EmulatePOP()
1143 const ARMEncoding encoding) { in EmulateADDRdSPImm() argument
1170 switch (encoding) { in EmulateADDRdSPImm()
1204 const ARMEncoding encoding) { in EmulateMOVRdSP() argument
1230 switch (encoding) { in EmulateMOVRdSP()
1259 const ARMEncoding encoding) { in EmulateMOVLowHigh() argument
1260 return EmulateMOVRdRm(opcode, encoding); in EmulateMOVLowHigh()
1266 const ARMEncoding encoding) { in EmulateMOVRdRm() argument
1291 switch (encoding) { in EmulateMOVRdRm()
1326 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateMOVRdRm()
1357 const ARMEncoding encoding) { in EmulateMOVRdImm() argument
1384 switch (encoding) { in EmulateMOVRdImm()
1428 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateMOVRdImm()
1470 const ARMEncoding encoding) { in EmulateMUL() argument
1494 switch (encoding) { in EmulateMUL()
1599 const ARMEncoding encoding) { in EmulateMVNImm() argument
1623 switch (encoding) { in EmulateMVNImm()
1637 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateMVNImm()
1659 const ARMEncoding encoding) { in EmulateMVNReg() argument
1686 switch (encoding) { in EmulateMVNReg()
1740 const ARMEncoding encoding) { in EmulateLDRRtPCRelative() argument
1780 switch (encoding) { in EmulateLDRRtPCRelative()
1828 const ARMEncoding encoding) { in EmulateADDSPImm() argument
1856 switch (encoding) { in EmulateADDSPImm()
1939 const ARMEncoding encoding) { in EmulateADDSPRm() argument
1966 switch (encoding) { in EmulateADDSPRm()
1999 const ARMEncoding encoding) { in EmulateBLXImmediate() argument
2029 switch (encoding) { in EmulateBLXImmediate()
2103 const ARMEncoding encoding) { in EmulateBLXRm() argument
2130 switch (encoding) { in EmulateBLXRm()
2168 const ARMEncoding encoding) { in EmulateBXRm() argument
2182 switch (encoding) { in EmulateBXRm()
2216 const ARMEncoding encoding) { in EmulateBXJRm() argument
2236 switch (encoding) { in EmulateBXJRm()
2269 const ARMEncoding encoding) { in EmulateSUBR7IPImm() argument
2294 switch (encoding) { in EmulateSUBR7IPImm()
2319 const ARMEncoding encoding) { in EmulateSUBIPSPImm() argument
2344 switch (encoding) { in EmulateSUBIPSPImm()
2372 const ARMEncoding encoding) { in EmulateSUBSPImm() argument
2400 switch (encoding) { in EmulateSUBSPImm()
2430 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSUBSPImm()
2458 const ARMEncoding encoding) { in EmulateSTRRtSP() argument
2485 switch (encoding) { in EmulateSTRRtSP()
2552 const ARMEncoding encoding) { in EmulateVPUSH() argument
2583 switch (encoding) { in EmulateVPUSH()
2645 const ARMEncoding encoding) { in EmulateVPOP() argument
2675 switch (encoding) { in EmulateVPOP()
2734 const ARMEncoding encoding) { in EmulateSVC() argument
2753 switch (encoding) { in EmulateSVC()
2780 const ARMEncoding encoding) { in EmulateIT() argument
2792 const ARMEncoding encoding) { in EmulateNop() argument
2799 const ARMEncoding encoding) { in EmulateB() argument
2819 switch (encoding) { in EmulateB()
2883 const ARMEncoding encoding) { in EmulateCB() argument
2907 switch (encoding) { in EmulateCB()
2937 const ARMEncoding encoding) { in EmulateTB() argument
2956 switch (encoding) { in EmulateTB()
3011 const ARMEncoding encoding) { in EmulateADDImmThumb() argument
3034 switch (encoding) { in EmulateADDImmThumb()
3132 const ARMEncoding encoding) { in EmulateADDImmARM() argument
3156 switch (encoding) { in EmulateADDImmARM()
3197 const ARMEncoding encoding) { in EmulateADDReg() argument
3222 switch (encoding) { in EmulateADDReg()
3286 const ARMEncoding encoding) { in EmulateCMNImm() argument
3302 switch (encoding) { in EmulateCMNImm()
3333 const ARMEncoding encoding) { in EmulateCMNReg() argument
3352 switch (encoding) { in EmulateCMNReg()
3399 const ARMEncoding encoding) { in EmulateCMPImm() argument
3415 switch (encoding) { in EmulateCMPImm()
3450 const ARMEncoding encoding) { in EmulateCMPReg() argument
3469 switch (encoding) { in EmulateCMPReg()
3527 const ARMEncoding encoding) { in EmulateASRImm() argument
3544 return EmulateShiftImm(opcode, encoding, SRType_ASR); in EmulateASRImm()
3553 const ARMEncoding encoding) { in EmulateASRReg() argument
3568 return EmulateShiftReg(opcode, encoding, SRType_ASR); in EmulateASRReg()
3575 const ARMEncoding encoding) { in EmulateLSLImm() argument
3592 return EmulateShiftImm(opcode, encoding, SRType_LSL); in EmulateLSLImm()
3600 const ARMEncoding encoding) { in EmulateLSLReg() argument
3615 return EmulateShiftReg(opcode, encoding, SRType_LSL); in EmulateLSLReg()
3623 const ARMEncoding encoding) { in EmulateLSRImm() argument
3640 return EmulateShiftImm(opcode, encoding, SRType_LSR); in EmulateLSRImm()
3648 const ARMEncoding encoding) { in EmulateLSRReg() argument
3663 return EmulateShiftReg(opcode, encoding, SRType_LSR); in EmulateLSRReg()
3671 const ARMEncoding encoding) { in EmulateRORImm() argument
3688 return EmulateShiftImm(opcode, encoding, SRType_ROR); in EmulateRORImm()
3697 const ARMEncoding encoding) { in EmulateRORReg() argument
3712 return EmulateShiftReg(opcode, encoding, SRType_ROR); in EmulateRORReg()
3721 const ARMEncoding encoding) { in EmulateRRX() argument
3738 return EmulateShiftImm(opcode, encoding, SRType_RRX); in EmulateRRX()
3742 const ARMEncoding encoding, in EmulateShiftImm() argument
3761 ARMEncoding use_encoding = encoding; in EmulateShiftImm()
3828 const ARMEncoding encoding, in EmulateShiftReg() argument
3844 switch (encoding) { in EmulateShiftReg()
3902 const ARMEncoding encoding) { in EmulateLDM() argument
3926 switch (encoding) { in EmulateLDM()
4045 const ARMEncoding encoding) { in EmulateLDMDA() argument
4072 switch (encoding) { in EmulateLDMDA()
4160 const ARMEncoding encoding) { in EmulateLDMDB() argument
4184 switch (encoding) { in EmulateLDMDB()
4297 const ARMEncoding encoding) { in EmulateLDMIB() argument
4320 switch (encoding) { in EmulateLDMIB()
4407 const ARMEncoding encoding) { in EmulateLDRRtRnImm() argument
4435 switch (encoding) { in EmulateLDRRtRnImm()
4570 const ARMEncoding encoding) { in EmulateSTM() argument
4598 switch (encoding) { in EmulateSTM()
4722 const ARMEncoding encoding) { in EmulateSTMDA() argument
4751 switch (encoding) { in EmulateSTMDA()
4844 const ARMEncoding encoding) { in EmulateSTMDB() argument
4873 switch (encoding) { in EmulateSTMDB()
4993 const ARMEncoding encoding) { in EmulateSTMIB() argument
5022 switch (encoding) { in EmulateSTMIB()
5115 const ARMEncoding encoding) { in EmulateSTRThumb() argument
5140 switch (encoding) { in EmulateSTRThumb()
5282 const ARMEncoding encoding) { in EmulateSTRRegister() argument
5315 switch (encoding) { in EmulateSTRRegister()
5471 const ARMEncoding encoding) { in EmulateSTRBThumb() argument
5491 switch (encoding) { in EmulateSTRBThumb()
5607 const ARMEncoding encoding) { in EmulateSTRHRegister() argument
5634 switch (encoding) { in EmulateSTRHRegister()
5781 const ARMEncoding encoding) { in EmulateADCImm() argument
5805 switch (encoding) { in EmulateADCImm()
5821 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateADCImm()
5850 const ARMEncoding encoding) { in EmulateADCReg() argument
5875 switch (encoding) { in EmulateADCReg()
5900 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateADCReg()
5935 const ARMEncoding encoding) { in EmulateADR() argument
5953 switch (encoding) { in EmulateADR()
5998 const ARMEncoding encoding) { in EmulateANDImm() argument
6023 switch (encoding) { in EmulateANDImm()
6046 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateANDImm()
6073 const ARMEncoding encoding) { in EmulateANDReg() argument
6099 switch (encoding) { in EmulateANDReg()
6127 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateANDReg()
6163 const ARMEncoding encoding) { in EmulateBICImm() argument
6188 switch (encoding) { in EmulateBICImm()
6210 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateBICImm()
6238 const ARMEncoding encoding) { in EmulateBICReg() argument
6264 switch (encoding) { in EmulateBICReg()
6291 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateBICReg()
6327 const ARMEncoding encoding) { in EmulateLDRImmediateARM() argument
6355 switch (encoding) { in EmulateLDRImmediateARM()
6463 const ARMEncoding encoding) { in EmulateLDRRegister() argument
6497 switch (encoding) { in EmulateLDRRegister()
6669 const ARMEncoding encoding) { in EmulateLDRBImmediate() argument
6690 switch (encoding) { in EmulateLDRBImmediate()
6816 const ARMEncoding encoding) { in EmulateLDRBLiteral() argument
6831 switch (encoding) { in EmulateLDRBLiteral()
6897 const ARMEncoding encoding) { in EmulateLDRBRegister() argument
6921 switch (encoding) { in EmulateLDRBRegister()
7059 const ARMEncoding encoding) { in EmulateLDRHImmediate() argument
7084 switch (encoding) { in EmulateLDRHImmediate()
7206 const ARMEncoding encoding) { in EmulateLDRHLiteral() argument
7227 switch (encoding) { in EmulateLDRHLiteral()
7310 const ARMEncoding encoding) { in EmulateLDRHRegister() argument
7338 switch (encoding) { in EmulateLDRHRegister()
7486 const ARMEncoding encoding) { in EmulateLDRSBImmediate() argument
7507 switch (encoding) { in EmulateLDRSBImmediate()
7635 const ARMEncoding encoding) { in EmulateLDRSBLiteral() argument
7652 switch (encoding) { in EmulateLDRSBLiteral()
7723 const ARMEncoding encoding) { in EmulateLDRSBRegister() argument
7747 switch (encoding) { in EmulateLDRSBRegister()
7883 const ARMEncoding encoding) { in EmulateLDRSHImmediate() argument
7908 switch (encoding) { in EmulateLDRSHImmediate()
8042 const ARMEncoding encoding) { in EmulateLDRSHLiteral() argument
8063 switch (encoding) { in EmulateLDRSHLiteral()
8143 const ARMEncoding encoding) { in EmulateLDRSHRegister() argument
8171 switch (encoding) { in EmulateLDRSHRegister()
8322 const ARMEncoding encoding) { in EmulateSXTB() argument
8338 switch (encoding) { in EmulateSXTB()
8407 const ARMEncoding encoding) { in EmulateSXTH() argument
8423 switch (encoding) { in EmulateSXTH()
8492 const ARMEncoding encoding) { in EmulateUXTB() argument
8508 switch (encoding) { in EmulateUXTB()
8575 const ARMEncoding encoding) { in EmulateUXTH() argument
8590 switch (encoding) { in EmulateUXTH()
8656 const ARMEncoding encoding) { in EmulateRFE() argument
8679 switch (encoding) { in EmulateRFE()
8802 const ARMEncoding encoding) { in EmulateEORImm() argument
8827 switch (encoding) { in EmulateEORImm()
8852 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateEORImm()
8880 const ARMEncoding encoding) { in EmulateEORReg() argument
8906 switch (encoding) { in EmulateEORReg()
8936 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateEORReg()
8971 const ARMEncoding encoding) { in EmulateORRImm() argument
8996 switch (encoding) { in EmulateORRImm()
9019 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateORRImm()
9047 const ARMEncoding encoding) { in EmulateORRReg() argument
9073 switch (encoding) { in EmulateORRReg()
9101 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateORRReg()
9136 const ARMEncoding encoding) { in EmulateRSBImm() argument
9160 switch (encoding) { in EmulateRSBImm()
9184 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateRSBImm()
9208 const ARMEncoding encoding) { in EmulateRSBReg() argument
9234 switch (encoding) { in EmulateRSBReg()
9255 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateRSBReg()
9287 const ARMEncoding encoding) { in EmulateRSCImm() argument
9311 switch (encoding) { in EmulateRSCImm()
9321 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateRSCImm()
9346 const ARMEncoding encoding) { in EmulateRSCReg() argument
9372 switch (encoding) { in EmulateRSCReg()
9383 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateRSCReg()
9416 const ARMEncoding encoding) { in EmulateSBCImm() argument
9440 switch (encoding) { in EmulateSBCImm()
9458 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSBCImm()
9484 const ARMEncoding encoding) { in EmulateSBCReg() argument
9510 switch (encoding) { in EmulateSBCReg()
9537 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSBCReg()
9568 const ARMEncoding encoding) { in EmulateSUBImmThumb() argument
9589 switch (encoding) { in EmulateSUBImmThumb()
9658 const ARMEncoding encoding) { in EmulateSUBImmARM() argument
9683 switch (encoding) { in EmulateSUBImmARM()
9701 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSUBImmARM()
9735 const ARMEncoding encoding) { in EmulateTEQImm() argument
9754 switch (encoding) { in EmulateTEQImm()
9794 const ARMEncoding encoding) { in EmulateTEQReg() argument
9814 switch (encoding) { in EmulateTEQReg()
9860 const ARMEncoding encoding) { in EmulateTSTImm() argument
9879 switch (encoding) { in EmulateTSTImm()
9919 const ARMEncoding encoding) { in EmulateTSTReg() argument
9939 switch (encoding) { in EmulateTSTReg()
9989 const ARMEncoding encoding) { in EmulateSUBSPReg() argument
10015 switch (encoding) { in EmulateSUBSPReg()
10044 EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSUBSPReg()
10087 const ARMEncoding encoding) { in EmulateADDRegShift() argument
10112 switch (encoding) { in EmulateADDRegShift()
10183 const ARMEncoding encoding) { in EmulateSUBReg() argument
10210 switch (encoding) { in EmulateSUBReg()
10261 EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSUBReg()
10317 const ARMEncoding encoding) { in EmulateSTREX() argument
10338 switch (encoding) { in EmulateSTREX()
10428 const ARMEncoding encoding) { in EmulateSTRBImmARM() argument
10448 switch (encoding) { in EmulateSTRBImmARM()
10521 const ARMEncoding encoding) { in EmulateSTRImmARM() argument
10543 switch (encoding) { in EmulateSTRImmARM()
10630 const ARMEncoding encoding) { in EmulateLDRDImmediate() argument
10652 switch (encoding) { in EmulateLDRDImmediate()
10776 const ARMEncoding encoding) { in EmulateLDRDRegister() argument
10798 switch (encoding) { in EmulateLDRDRegister()
10901 const ARMEncoding encoding) { in EmulateSTRDImm() argument
10923 switch (encoding) { in EmulateSTRDImm()
11054 const ARMEncoding encoding) { in EmulateSTRDReg() argument
11076 switch (encoding) { in EmulateSTRDReg()
11191 const ARMEncoding encoding) { in EmulateVLDM() argument
11218 switch (encoding) { in EmulateVLDM()
11384 const ARMEncoding encoding) { in EmulateVSTM() argument
11412 switch (encoding) { in EmulateVSTM()
11589 ARMEncoding encoding) { in EmulateVLDR() argument
11613 switch (encoding) { in EmulateVLDR()
11716 ARMEncoding encoding) { in EmulateVSTR() argument
11739 switch (encoding) { in EmulateVSTR()
11848 ARMEncoding encoding) { in EmulateVLD1Multiple() argument
11874 switch (encoding) { in EmulateVLD1Multiple()
12006 const ARMEncoding encoding) { in EmulateVLD1Single() argument
12028 switch (encoding) { in EmulateVLD1Single()
12035 return EmulateVLD1SingleAll(opcode, encoding); in EmulateVLD1Single()
12182 ARMEncoding encoding) { in EmulateVST1Multiple() argument
12208 switch (encoding) { in EmulateVST1Multiple()
12338 ARMEncoding encoding) { in EmulateVST1Single() argument
12360 switch (encoding) { in EmulateVST1Single()
12497 const ARMEncoding encoding) { in EmulateVLD1SingleAll() argument
12521 switch (encoding) { in EmulateVLD1SingleAll()
12627 const ARMEncoding encoding) { in EmulateSUBSPcLrEtc() argument
12662 switch (encoding) { in EmulateSUBSPcLrEtc()
14309 opcode_data->encoding); in EvaluateInstruction()