Lines Matching refs:Rd
1168 uint32_t Rd; // the destination register in EmulateADDRdSPImm() local
1172 Rd = 7; in EmulateADDRdSPImm()
1176 Rd = Bits32(opcode, 15, 12); in EmulateADDRdSPImm()
1186 if (Rd == GetFramePointerRegisterNumber()) in EmulateADDRdSPImm()
1194 if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + Rd, in EmulateADDRdSPImm()
1229 uint32_t Rd; // the destination register in EmulateMOVRdSP() local
1232 Rd = 7; in EmulateMOVRdSP()
1235 Rd = 12; in EmulateMOVRdSP()
1242 if (Rd == GetFramePointerRegisterNumber()) in EmulateMOVRdSP()
1250 if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + Rd, sp)) in EmulateMOVRdSP()
1289 uint32_t Rd; // the destination register in EmulateMOVRdRm() local
1293 Rd = Bit32(opcode, 7) << 3 | Bits32(opcode, 2, 0); in EmulateMOVRdRm()
1296 if (Rd == 15 && InITBlock() && !LastInITBlock()) in EmulateMOVRdRm()
1300 Rd = Bits32(opcode, 2, 0); in EmulateMOVRdRm()
1307 Rd = Bits32(opcode, 11, 8); in EmulateMOVRdRm()
1311 if (setflags && (BadReg(Rd) || BadReg(Rm))) in EmulateMOVRdRm()
1315 if (!setflags && (Rd == 15 || Rm == 15 || (Rd == 13 && Rm == 13))) in EmulateMOVRdRm()
1319 Rd = Bits32(opcode, 15, 12); in EmulateMOVRdRm()
1325 if (Rd == 15 && setflags) in EmulateMOVRdRm()
1337 if (Rd == 13) in EmulateMOVRdRm()
1339 else if (Rd == GetFramePointerRegisterNumber() && Rm == 13) in EmulateMOVRdRm()
1347 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags)) in EmulateMOVRdRm()
1377 uint32_t Rd; // the destination register in EmulateMOVRdImm() local
1386 Rd = Bits32(opcode, 10, 8); in EmulateMOVRdImm()
1394 Rd = Bits32(opcode, 11, 8); in EmulateMOVRdImm()
1397 if (BadReg(Rd)) in EmulateMOVRdImm()
1405 Rd = Bits32(opcode, 11, 8); in EmulateMOVRdImm()
1414 if (BadReg(Rd)) in EmulateMOVRdImm()
1421 Rd = Bits32(opcode, 15, 12); in EmulateMOVRdImm()
1427 if ((Rd == 15) && setflags) in EmulateMOVRdImm()
1434 Rd = Bits32(opcode, 15, 12); in EmulateMOVRdImm()
1441 if (Rd == 15) in EmulateMOVRdImm()
1455 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMOVRdImm()
1619 uint32_t Rd; // the destination register in EmulateMVNImm() local
1625 Rd = Bits32(opcode, 11, 8); in EmulateMVNImm()
1630 Rd = Bits32(opcode, 15, 12); in EmulateMVNImm()
1636 if (Rd == 15 && setflags) in EmulateMVNImm()
1649 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNImm()
1681 uint32_t Rd; // the destination register in EmulateMVNReg() local
1688 Rd = Bits32(opcode, 2, 0); in EmulateMVNReg()
1697 Rd = Bits32(opcode, 11, 8); in EmulateMVNReg()
1702 if (BadReg(Rd) || BadReg(Rm)) in EmulateMVNReg()
1706 Rd = Bits32(opcode, 15, 12); in EmulateMVNReg()
1730 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNReg()
2397 uint32_t Rd; in EmulateSUBSPImm() local
2402 Rd = 13; in EmulateSUBSPImm()
2407 Rd = Bits32(opcode, 11, 8); in EmulateSUBSPImm()
2410 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2412 if (Rd == 15 && !setflags) in EmulateSUBSPImm()
2416 Rd = Bits32(opcode, 11, 8); in EmulateSUBSPImm()
2419 if (Rd == 15) in EmulateSUBSPImm()
2423 Rd = Bits32(opcode, 15, 12); in EmulateSUBSPImm()
2429 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2438 if (Rd == 13) { in EmulateSUBSPImm()
2449 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBSPImm()
3152 uint32_t Rd, Rn; in EmulateADDImmARM() local
3158 Rd = Bits32(opcode, 15, 12); in EmulateADDImmARM()
3175 if (Rd == 13) in EmulateADDImmARM()
3177 else if (Rd == GetFramePointerRegisterNumber()) in EmulateADDImmARM()
3186 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDImmARM()
3218 uint32_t Rd, Rn, Rm; in EmulateADDReg() local
3224 Rd = Bits32(opcode, 2, 0); in EmulateADDReg()
3232 Rd = Rn = Bit32(opcode, 7) << 3 | Bits32(opcode, 2, 0); in EmulateADDReg()
3239 if (Rd == 15 && InITBlock() && !LastInITBlock()) in EmulateADDReg()
3243 Rd = Bits32(opcode, 15, 12); in EmulateADDReg()
3276 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDReg()
3753 uint32_t Rd; // the destination register in EmulateShiftImm() local
3771 Rd = Bits32(opcode, 2, 0); in EmulateShiftImm()
3782 Rd = Bits32(opcode, 11, 8); in EmulateShiftImm()
3786 if (BadReg(Rd) || BadReg(Rm)) in EmulateShiftImm()
3790 Rd = Bits32(opcode, 15, 12); in EmulateShiftImm()
3821 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftImm()
3838 uint32_t Rd; // the destination register in EmulateShiftReg() local
3846 Rd = Bits32(opcode, 2, 0); in EmulateShiftReg()
3847 Rn = Rd; in EmulateShiftReg()
3852 Rd = Bits32(opcode, 11, 8); in EmulateShiftReg()
3856 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateShiftReg()
3860 Rd = Bits32(opcode, 15, 12); in EmulateShiftReg()
3864 if (Rd == 15 || Rn == 15 || Rm == 15) in EmulateShiftReg()
3892 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftReg()
5801 uint32_t Rd, Rn; in EmulateADCImm() local
5807 Rd = Bits32(opcode, 11, 8); in EmulateADCImm()
5811 if (BadReg(Rd) || BadReg(Rn)) in EmulateADCImm()
5815 Rd = Bits32(opcode, 15, 12); in EmulateADCImm()
5820 if (Rd == 15 && setflags) in EmulateADCImm()
5838 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCImm()
5871 uint32_t Rd, Rn, Rm; in EmulateADCReg() local
5877 Rd = Rn = Bits32(opcode, 2, 0); in EmulateADCReg()
5884 Rd = Bits32(opcode, 11, 8); in EmulateADCReg()
5889 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateADCReg()
5893 Rd = Bits32(opcode, 15, 12); in EmulateADCReg()
5899 if (Rd == 15 && setflags) in EmulateADCReg()
5925 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCReg()
5950 uint32_t Rd; in EmulateADR() local
5955 Rd = Bits32(opcode, 10, 8); in EmulateADR()
5961 Rd = Bits32(opcode, 11, 8); in EmulateADR()
5964 if (BadReg(Rd)) in EmulateADR()
5969 Rd = Bits32(opcode, 15, 12); in EmulateADR()
5988 if (!WriteCoreReg(context, result, Rd)) in EmulateADR()
6018 uint32_t Rd, Rn; in EmulateANDImm() local
6025 Rd = Bits32(opcode, 11, 8); in EmulateANDImm()
6032 if (Rd == 15 && setflags) in EmulateANDImm()
6034 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateANDImm()
6038 Rd = Bits32(opcode, 15, 12); in EmulateANDImm()
6045 if (Rd == 15 && setflags) in EmulateANDImm()
6063 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDImm()
6094 uint32_t Rd, Rn, Rm; in EmulateANDReg() local
6101 Rd = Rn = Bits32(opcode, 2, 0); in EmulateANDReg()
6108 Rd = Bits32(opcode, 11, 8); in EmulateANDReg()
6114 if (Rd == 15 && setflags) in EmulateANDReg()
6116 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateANDReg()
6120 Rd = Bits32(opcode, 15, 12); in EmulateANDReg()
6126 if (Rd == 15 && setflags) in EmulateANDReg()
6152 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDReg()
6183 uint32_t Rd, Rn; in EmulateBICImm() local
6190 Rd = Bits32(opcode, 11, 8); in EmulateBICImm()
6196 if (BadReg(Rd) || BadReg(Rn)) in EmulateBICImm()
6200 Rd = Bits32(opcode, 15, 12); in EmulateBICImm()
6209 if (Rd == 15 && setflags) in EmulateBICImm()
6227 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICImm()
6259 uint32_t Rd, Rn, Rm; in EmulateBICReg() local
6266 Rd = Rn = Bits32(opcode, 2, 0); in EmulateBICReg()
6273 Rd = Bits32(opcode, 11, 8); in EmulateBICReg()
6278 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateBICReg()
6282 Rd = Bits32(opcode, 15, 12); in EmulateBICReg()
6290 if (Rd == 15 && setflags) in EmulateBICReg()
6316 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICReg()
8822 uint32_t Rd, Rn; in EmulateEORImm() local
8829 Rd = Bits32(opcode, 11, 8); in EmulateEORImm()
8836 if (Rd == 15 && setflags) in EmulateEORImm()
8838 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateEORImm()
8842 Rd = Bits32(opcode, 15, 12); in EmulateEORImm()
8851 if (Rd == 15 && setflags) in EmulateEORImm()
8869 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORImm()
8901 uint32_t Rd, Rn, Rm; in EmulateEORReg() local
8908 Rd = Rn = Bits32(opcode, 2, 0); in EmulateEORReg()
8915 Rd = Bits32(opcode, 11, 8); in EmulateEORReg()
8921 if (Rd == 15 && setflags) in EmulateEORReg()
8923 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateEORReg()
8927 Rd = Bits32(opcode, 15, 12); in EmulateEORReg()
8935 if (Rd == 15 && setflags) in EmulateEORReg()
8961 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORReg()
8991 uint32_t Rd, Rn; in EmulateORRImm() local
8998 Rd = Bits32(opcode, 11, 8); in EmulateORRImm()
9007 if (BadReg(Rd) || Rn == 13) in EmulateORRImm()
9011 Rd = Bits32(opcode, 15, 12); in EmulateORRImm()
9018 if (Rd == 15 && setflags) in EmulateORRImm()
9036 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRImm()
9068 uint32_t Rd, Rn, Rm; in EmulateORRReg() local
9075 Rd = Rn = Bits32(opcode, 2, 0); in EmulateORRReg()
9082 Rd = Bits32(opcode, 11, 8); in EmulateORRReg()
9090 if (BadReg(Rd) || Rn == 13 || BadReg(Rm)) in EmulateORRReg()
9094 Rd = Bits32(opcode, 15, 12); in EmulateORRReg()
9100 if (Rd == 15 && setflags) in EmulateORRReg()
9126 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRReg()
9155 uint32_t Rd; // the destination register in EmulateRSBImm() local
9162 Rd = Bits32(opcode, 2, 0); in EmulateRSBImm()
9168 Rd = Bits32(opcode, 11, 8); in EmulateRSBImm()
9172 if (BadReg(Rd) || BadReg(Rn)) in EmulateRSBImm()
9176 Rd = Bits32(opcode, 15, 12); in EmulateRSBImm()
9183 if (Rd == 15 && setflags) in EmulateRSBImm()
9200 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBImm()
9228 uint32_t Rd; // the destination register in EmulateRSBReg() local
9236 Rd = Bits32(opcode, 11, 8); in EmulateRSBReg()
9242 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateRSBReg()
9246 Rd = Bits32(opcode, 15, 12); in EmulateRSBReg()
9254 if (Rd == 15 && setflags) in EmulateRSBReg()
9278 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBReg()
9306 uint32_t Rd; // the destination register in EmulateRSCImm() local
9313 Rd = Bits32(opcode, 15, 12); in EmulateRSCImm()
9320 if (Rd == 15 && setflags) in EmulateRSCImm()
9337 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCImm()
9366 uint32_t Rd; // the destination register in EmulateRSCReg() local
9374 Rd = Bits32(opcode, 15, 12); in EmulateRSCReg()
9382 if (Rd == 15 && setflags) in EmulateRSCReg()
9406 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCReg()
9435 uint32_t Rd; // the destination register in EmulateSBCImm() local
9442 Rd = Bits32(opcode, 11, 8); in EmulateSBCImm()
9446 if (BadReg(Rd) || BadReg(Rn)) in EmulateSBCImm()
9450 Rd = Bits32(opcode, 15, 12); in EmulateSBCImm()
9457 if (Rd == 15 && setflags) in EmulateSBCImm()
9474 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCImm()
9504 uint32_t Rd; // the destination register in EmulateSBCReg() local
9512 Rd = Rn = Bits32(opcode, 2, 0); in EmulateSBCReg()
9519 Rd = Bits32(opcode, 11, 8); in EmulateSBCReg()
9524 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateSBCReg()
9528 Rd = Bits32(opcode, 15, 12); in EmulateSBCReg()
9536 if (Rd == 15 && setflags) in EmulateSBCReg()
9560 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCReg()
9584 uint32_t Rd; // the destination register in EmulateSUBImmThumb() local
9591 Rd = Bits32(opcode, 2, 0); in EmulateSUBImmThumb()
9597 Rd = Rn = Bits32(opcode, 10, 8); in EmulateSUBImmThumb()
9602 Rd = Bits32(opcode, 11, 8); in EmulateSUBImmThumb()
9608 if (Rd == 15 && setflags) in EmulateSUBImmThumb()
9616 if (Rd == 13 || (Rd == 15 && !setflags) || Rn == 15) in EmulateSUBImmThumb()
9620 Rd = Bits32(opcode, 11, 8); in EmulateSUBImmThumb()
9633 if (BadReg(Rd)) in EmulateSUBImmThumb()
9650 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmThumb()
9678 uint32_t Rd; // the destination register in EmulateSUBImmARM() local
9685 Rd = Bits32(opcode, 15, 12); in EmulateSUBImmARM()
9700 if (Rd == 15 && setflags) in EmulateSUBImmARM()
9714 if (Rd == 13) in EmulateSUBImmARM()
9724 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmARM()
14216 Context &context, const uint32_t result, const uint32_t Rd, bool setflags, in WriteCoreRegOptionalFlags() argument
14218 if (Rd == 15) { in WriteCoreRegOptionalFlags()
14224 switch (Rd) { in WriteCoreRegOptionalFlags()
14235 reg_num = dwarf_r0 + Rd; in WriteCoreRegOptionalFlags()