Lines Matching refs:mc_inst

62                      lldb::addr_t pc, llvm::MCInst &mc_inst) const;
63 void PrintMCInst(llvm::MCInst &mc_inst, lldb::addr_t pc,
68 bool CanBranch(llvm::MCInst &mc_inst) const;
69 bool HasDelaySlot(llvm::MCInst &mc_inst) const;
70 bool IsCall(llvm::MCInst &mc_inst) const;
71 bool IsLoad(llvm::MCInst &mc_inst) const;
72 bool IsAuthenticated(llvm::MCInst &mc_inst) const;
1344 llvm::MCInst &mc_inst) const { in GetMCInst()
1349 status = m_disasm_up->getInstruction(mc_inst, new_inst_size, data, pc, in GetMCInst()
1358 llvm::MCInst &mc_inst, lldb::addr_t pc, std::string &inst_string, in PrintMCInst() argument
1365 m_instr_printer_up->printInst(&mc_inst, pc, llvm::StringRef(), in PrintMCInst()
1404 llvm::MCInst &mc_inst) const { in CanBranch()
1406 return m_instr_analysis_up->mayAffectControlFlow(mc_inst, *m_reg_info_up); in CanBranch()
1407 return m_instr_info_up->get(mc_inst.getOpcode()) in CanBranch()
1408 .mayAffectControlFlow(mc_inst, *m_reg_info_up); in CanBranch()
1412 llvm::MCInst &mc_inst) const { in HasDelaySlot()
1413 return m_instr_info_up->get(mc_inst.getOpcode()).hasDelaySlot(); in HasDelaySlot()
1416 bool DisassemblerLLVMC::MCDisasmInstance::IsCall(llvm::MCInst &mc_inst) const { in IsCall()
1418 return m_instr_analysis_up->isCall(mc_inst); in IsCall()
1419 return m_instr_info_up->get(mc_inst.getOpcode()).isCall(); in IsCall()
1422 bool DisassemblerLLVMC::MCDisasmInstance::IsLoad(llvm::MCInst &mc_inst) const { in IsLoad()
1423 return m_instr_info_up->get(mc_inst.getOpcode()).mayLoad(); in IsLoad()
1427 llvm::MCInst &mc_inst) const { in IsAuthenticated()
1428 const auto &InstrDesc = m_instr_info_up->get(mc_inst.getOpcode()); in IsAuthenticated()
1434 if (InstrDesc.isTrap() && mc_inst.getNumOperands() == 1) { in IsAuthenticated()
1435 const llvm::MCOperand &Op0 = mc_inst.getOperand(0); in IsAuthenticated()