Lines Matching refs:OutputBecomesInput

10741   bool OutputBecomesInput = false;  in getNDSWDS()  local
10747 OutputBecomesInput = true; in getNDSWDS()
10766 OutputBecomesInput); in getNDSWDS()
10775 StringRef MangledName, bool OutputBecomesInput, in addAArch64VectorName() argument
10780 if (OutputBecomesInput) in addAArch64VectorName()
10791 bool OutputBecomesInput, in addAArch64AdvSIMDNDSNames() argument
10796 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10798 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10802 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10804 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10808 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10810 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10815 OutputBecomesInput, Fn); in addAArch64AdvSIMDNDSNames()
10833 const bool OutputBecomesInput = std::get<2>(Data); in emitAArch64DeclareSimdFunction() local
10877 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10885 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10887 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10891 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10895 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10905 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10914 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10916 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10920 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()
10924 OutputBecomesInput, Fn); in emitAArch64DeclareSimdFunction()