132   ArchVersion = llvm::ARM::parseArchVersion(SubArch);  in setArchInfo()
143       (ArchISA == llvm::ARM::ISAKind::ARM && ArchVersion >= 6) ||  in setAtomic()
144       (ArchISA == llvm::ARM::ISAKind::THUMB && ArchVersion >= 7);  in setAtomic()
172   return CPUAttr.count('T') || ArchVersion >= 6;  in supportsThumb()
177          (ArchVersion >= 7 && !CPUAttr.equals("8M_BASE"));  in supportsThumb2()
574       if (CPUProfile != "M" || ArchVersion != 8) {  in handleTargetFeatures()
613   switch (ArchVersion) {  in handleTargetFeatures()
741   Builder.defineMacro("__ARM_ARCH", Twine(ArchVersion));  in getTargetDefines()
743   if (ArchVersion >= 8) {  in getTargetDefines()
796   if (ArchVersion == 5 || (ArchVersion == 6 && CPUProfile != "M") ||  in getTargetDefines()
797       ArchVersion > 6)  in getTargetDefines()
812   if (ArchVersion >= 7 && (FPU & VFP4FPU))  in getTargetDefines()
820   if (5 <= ArchVersion && ArchVersion <= 8 && !getTriple().isOSWindows())  in getTargetDefines()
918   if ((CPUProfile != "M" && ArchVersion >= 6) || (CPUProfile == "M" && DSP))  in getTargetDefines()
951   if ((FPU & NeonFPU) && !SoftFloat && ArchVersion >= 7) {  in getTargetDefines()
976   if (ArchVersion == 8 && ArchProfile == llvm::ARM::ProfileKind::M)  in getTargetDefines()
979   if (ArchVersion >= 6 && CPUAttr != "6M" && CPUAttr != "8M_BASE") {  in getTargetDefines()
993   if ((ArchVersion == 6 && CPUProfile != "M") || ArchVersion > 6) {  in getTargetDefines()
1165     if (CPUAttr.equals("6T2") || ArchVersion >= 7) {  in validateAsmConstraint()