Lines Matching refs:SETREG
53 #define SETREG(bas, reg, value) \ macro
196 SETREG(bas, UART_DM_CR, UART_DM_RESET_TX); in msm_init()
197 SETREG(bas, UART_DM_CR, UART_DM_RESET_RX); in msm_init()
198 SETREG(bas, UART_DM_CR, UART_DM_RESET_ERROR_STATUS); in msm_init()
199 SETREG(bas, UART_DM_CR, UART_DM_RESET_BREAK_INT); in msm_init()
200 SETREG(bas, UART_DM_CR, UART_DM_RESET_STALE_INT); in msm_init()
239 SETREG(bas, UART_DM_CR, UART_DM_CLEAR_TX_READY); in msm_putc()
249 SETREG(bas, UART_DM_TF(0), (c & 0xff)); in msm_putc()
377 SETREG(bas, UART_DM_IMR, u->ier); in msm_bus_transmit()
408 SETREG(bas, UART_DM_CR, UART_DM_RESET_STALE_INT); in msm_bus_receive()
409 SETREG(bas, UART_DM_CR, UART_DM_STALE_EVENT_ENABLE); in msm_bus_receive()
411 SETREG(bas, UART_DM_IMR, u->ier); in msm_bus_receive()
470 SETREG(bas, UART_DM_IMR, u->ier); in msm_bus_ipend()
478 SETREG(bas, UART_DM_CR, UART_DM_STALE_EVENT_DISABLE); in msm_bus_ipend()
479 SETREG(bas, UART_DM_CR, UART_DM_RESET_STALE_INT); in msm_bus_ipend()
487 SETREG(bas, UART_DM_CR, UART_DM_CLEAR_TX_READY); in msm_bus_ipend()
491 SETREG(bas, UART_DM_IMR, u->ier); in msm_bus_ipend()
501 SETREG(bas, UART_DM_IMR, u->ier); in msm_bus_ipend()
543 SETREG(bas, UART_DM_CR, UART_DM_RESET_STALE_INT); in msm_bus_grab()
544 SETREG(bas, UART_DM_IMR, 0); in msm_bus_grab()
559 SETREG(bas, UART_DM_IMR, u->ier); in msm_bus_ungrab()