75 static int imx_uart_probe(struct uart_bas *bas);
76 static void imx_uart_init(struct uart_bas *bas, int, int, int, int);
77 static void imx_uart_term(struct uart_bas *bas);
78 static void imx_uart_putc(struct uart_bas *bas, int);
79 static int imx_uart_rxready(struct uart_bas *bas);
80 static int imx_uart_getc(struct uart_bas *bas, struct mtx *);
93 dumpregs(struct uart_bas *bas, const char * msg)
100 	    msg, bas->bsh,
101 	    GETREG(bas, REG(UCR1)), GETREG(bas, REG(UCR2)), 
102 	    GETREG(bas, REG(UCR3)), GETREG(bas, REG(UCR4)),
103 	    GETREG(bas, REG(USR1)), GETREG(bas, REG(USR2)));
108 imx_uart_probe(struct uart_bas *bas)  in imx_uart_probe()  argument
115 imx_uart_getbaud(struct uart_bas *bas)  in imx_uart_getbaud()  argument
133 	i = (GETREG(bas, REG(UFCR)) & IMXUART_UFCR_RFDIV_MASK) >>  in imx_uart_getbaud()
135 	rate = bas->rclk / predivs[i];  in imx_uart_getbaud()
136 	ubir = GETREG(bas, REG(UBIR)) + 1;  in imx_uart_getbaud()
137 	ubmr = GETREG(bas, REG(UBMR)) + 1;  in imx_uart_getbaud()
154 imx_uart_init(struct uart_bas *bas, int baudrate, int databits,   in imx_uart_init()  argument
160 	SET(bas, REG(UCR1), FLD(UCR1, UARTEN));  in imx_uart_init()
161 	SET(bas, REG(UCR2), FLD(UCR2, RXEN) | FLD(UCR2, TXEN));  in imx_uart_init()
164 		DIS(bas, UCR2, WS);  in imx_uart_init()
166 		ENA(bas, UCR2, WS);  in imx_uart_init()
169 		ENA(bas, UCR2, STPB);  in imx_uart_init()
171 		DIS(bas, UCR2, STPB);  in imx_uart_init()
175 		DIS(bas, UCR2, PROE);  in imx_uart_init()
176 		ENA(bas, UCR2, PREN);  in imx_uart_init()
179 		ENA(bas, UCR2, PROE);  in imx_uart_init()
180 		ENA(bas, UCR2, PREN);  in imx_uart_init()
187 		DIS(bas, UCR2, PREN);  in imx_uart_init()
203 	if ((baudrate > 0) && (bas->rclk != 0)) {  in imx_uart_init()
204 		baseclk = bas->rclk;  in imx_uart_init()
205 		reg = GETREG(bas, REG(UFCR));  in imx_uart_init()
207 		SETREG(bas, REG(UFCR), reg);  in imx_uart_init()
208 		SETREG(bas, REG(UBIR), 15);  in imx_uart_init()
209 		SETREG(bas, REG(UBMR), (baseclk / baudrate) - 1);  in imx_uart_init()
217 	reg = GETREG(bas, REG(UFCR));  in imx_uart_init()
221 	SETREG(bas, REG(UFCR), reg);  in imx_uart_init()
225 imx_uart_term(struct uart_bas *bas)  in imx_uart_term()  argument
231 imx_uart_putc(struct uart_bas *bas, int c)  in imx_uart_putc()  argument
234 	while (!(IS(bas, USR1, TRDY)))  in imx_uart_putc()
236 	SETREG(bas, REG(UTXD), c);  in imx_uart_putc()
240 imx_uart_rxready(struct uart_bas *bas)  in imx_uart_rxready()  argument
243 	return ((IS(bas, USR2, RDR)) ? 1 : 0);  in imx_uart_rxready()
247 imx_uart_getc(struct uart_bas *bas, struct mtx *hwmtx)  in imx_uart_getc()  argument
252 	while (!(IS(bas, USR2, RDR)))  in imx_uart_getc()
255 	c = GETREG(bas, REG(URXD));  in imx_uart_getc()
337 	struct uart_bas *bas;  in imx_uart_setup_clocks()  local
342 	bas = &sc->sc_bas;  in imx_uart_setup_clocks()
363 	bas->rclk = (uint32_t)freq;  in imx_uart_setup_clocks()
372 	struct uart_bas *bas;  in imx_uart_bus_attach()  local
375 	bas = &sc->sc_bas;  in imx_uart_bus_attach()
382 	bas->rclk = imx_ccm_uart_hz();  in imx_uart_bus_attach()
387 		imx_uart_init(bas, di->baudrate, di->databits, di->stopbits,  in imx_uart_bus_attach()
390 		imx_uart_init(bas, 115200, 8, 1, 0);  in imx_uart_bus_attach()
396 	SETREG(bas, REG(USR1), 0xffff);  in imx_uart_bus_attach()
397 	SETREG(bas, REG(USR2), 0xffff);  in imx_uart_bus_attach()
399 	DIS(bas, UCR4, DREN);  in imx_uart_bus_attach()
400 	ENA(bas, UCR1, RRDYEN);  in imx_uart_bus_attach()
401 	DIS(bas, UCR1, IDEN);  in imx_uart_bus_attach()
402 	DIS(bas, UCR3, RXDSEN);  in imx_uart_bus_attach()
403 	ENA(bas, UCR2, ATEN);  in imx_uart_bus_attach()
404 	DIS(bas, UCR1, TXMPTYEN);  in imx_uart_bus_attach()
405 	DIS(bas, UCR1, TRDYEN);  in imx_uart_bus_attach()
406 	DIS(bas, UCR4, TCEN);  in imx_uart_bus_attach()
407 	DIS(bas, UCR4, OREN);  in imx_uart_bus_attach()
408 	ENA(bas, UCR4, BKEN);  in imx_uart_bus_attach()
409 	DIS(bas, UCR4, WKEN);  in imx_uart_bus_attach()
410 	DIS(bas, UCR1, ADEN);  in imx_uart_bus_attach()
411 	DIS(bas, UCR3, ACIEN);  in imx_uart_bus_attach()
412 	DIS(bas, UCR2, ESCI);  in imx_uart_bus_attach()
413 	DIS(bas, UCR4, ENIRI);  in imx_uart_bus_attach()
414 	DIS(bas, UCR3, AIRINTEN);  in imx_uart_bus_attach()
415 	DIS(bas, UCR3, AWAKEN);  in imx_uart_bus_attach()
416 	DIS(bas, UCR3, FRAERREN);  in imx_uart_bus_attach()
417 	DIS(bas, UCR3, PARERREN);  in imx_uart_bus_attach()
418 	DIS(bas, UCR1, RTSDEN);  in imx_uart_bus_attach()
419 	DIS(bas, UCR2, RTSEN);  in imx_uart_bus_attach()
420 	DIS(bas, UCR3, DTREN);  in imx_uart_bus_attach()
421 	DIS(bas, UCR3, RI);  in imx_uart_bus_attach()
422 	DIS(bas, UCR3, DCD);  in imx_uart_bus_attach()
423 	DIS(bas, UCR3, DTRDEN);  in imx_uart_bus_attach()
424 	ENA(bas, UCR2, IRTS);  in imx_uart_bus_attach()
425 	ENA(bas, UCR3, RXDMUXSEL);  in imx_uart_bus_attach()
470 	struct uart_bas *bas;  in imx_uart_bus_ioctl()  local
473 	bas = &sc->sc_bas;  in imx_uart_bus_ioctl()
481 		*(u_int*)data = imx_uart_getbaud(bas);  in imx_uart_bus_ioctl()
495 	struct uart_bas *bas;  in imx_uart_bus_ipend()  local
500 	bas = &sc->sc_bas;  in imx_uart_bus_ipend()
506 	usr1 = GETREG(bas, REG(USR1));  in imx_uart_bus_ipend()
507 	usr2 = GETREG(bas, REG(USR2));  in imx_uart_bus_ipend()
509 	SETREG(bas, REG(USR1), usr1);  in imx_uart_bus_ipend()
510 	SETREG(bas, REG(USR2), usr2);  in imx_uart_bus_ipend()
512 	ucr1 = GETREG(bas, REG(UCR1));  in imx_uart_bus_ipend()
513 	ucr2 = GETREG(bas, REG(UCR2));  in imx_uart_bus_ipend()
514 	ucr4 = GETREG(bas, REG(UCR4));  in imx_uart_bus_ipend()
518 		DIS(bas, UCR1, TRDYEN);  in imx_uart_bus_ipend()
529 		DIS(bas, UCR1, RRDYEN);  in imx_uart_bus_ipend()
530 		DIS(bas, UCR2, ATEN);  in imx_uart_bus_ipend()
579 	struct uart_bas *bas;  in imx_uart_bus_receive()  local
582 	bas = &sc->sc_bas;  in imx_uart_bus_receive()
591 	while (IS(bas, USR2, RDR)) {  in imx_uart_bus_receive()
597 		xc = GETREG(bas, REG(URXD));  in imx_uart_bus_receive()
610 	ENA(bas, UCR1, RRDYEN);  in imx_uart_bus_receive()
611 	ENA(bas, UCR2, ATEN);  in imx_uart_bus_receive()
627 	struct uart_bas *bas = &sc->sc_bas;  in imx_uart_bus_transmit()  local
630 	bas = &sc->sc_bas;  in imx_uart_bus_transmit()
640 		SETREG(bas, REG(UTXD), sc->sc_txbuf[i] & 0xff);  in imx_uart_bus_transmit()
643 	ENA(bas, UCR1, TRDYEN);  in imx_uart_bus_transmit()
653 	struct uart_bas *bas = &sc->sc_bas;  in imx_uart_bus_grab()  local
655 	bas = &sc->sc_bas;  in imx_uart_bus_grab()
657 	DIS(bas, UCR1, RRDYEN);  in imx_uart_bus_grab()
658 	DIS(bas, UCR2, ATEN);  in imx_uart_bus_grab()
665 	struct uart_bas *bas = &sc->sc_bas;  in imx_uart_bus_ungrab()  local
667 	bas = &sc->sc_bas;  in imx_uart_bus_ungrab()
669 	ENA(bas, UCR1, RRDYEN);  in imx_uart_bus_ungrab()
670 	ENA(bas, UCR2, ATEN);  in imx_uart_bus_ungrab()