430 			RT_READ(sc, GE_PORT_BASE + 0x0C00) | (0x7<<16));  in rt_attach()
839 		tmp = RT_READ(sc, sc->pdma_glo_cfg);  in rt_init_locked()
1468 	status = RT_READ(sc, sc->fe_int_status);  in rt_intr()
1551 	status = RT_READ(sc, sc->fe_int_status);  in rt_rt5350_intr()
1598 	tmp = RT_READ(sc, sc->pdma_glo_cfg);  in rt_tx_coherent_intr()
1630 	tmp = RT_READ(sc, sc->pdma_glo_cfg);  in rt_rx_coherent_intr()
1865 		index = RT_READ(sc, sc->rx_drx_idx[0]);  in rt_rx_eof()
2020 		index = RT_READ(sc, sc->tx_dtx_idx[ring->qid]);  in rt_tx_eof()
2097 		tmp = RT_READ(sc, PSE_BASE + CDMA_OQ_STA);  in rt_watchdog()
2108 			tmp = RT_READ(sc, PSE_BASE + PSE_IQ_STA);  in rt_watchdog()
2120 			tmp = RT_READ(sc, PSE_BASE + PSE_IQ_STA);  in rt_watchdog()
2137 	sc->tx_bytes	+= RT_READ(sc, CNTR_BASE + GDMA_TX_GBCNT0);  in rt_update_raw_counters()
2138 	sc->tx_packets	+= RT_READ(sc, CNTR_BASE + GDMA_TX_GPCNT0);  in rt_update_raw_counters()
2139 	sc->tx_skip	+= RT_READ(sc, CNTR_BASE + GDMA_TX_SKIPCNT0);  in rt_update_raw_counters()
2140 	sc->tx_collision+= RT_READ(sc, CNTR_BASE + GDMA_TX_COLCNT0);  in rt_update_raw_counters()
2142 	sc->rx_bytes	+= RT_READ(sc, CNTR_BASE + GDMA_RX_GBCNT0);  in rt_update_raw_counters()
2143 	sc->rx_packets	+= RT_READ(sc, CNTR_BASE + GDMA_RX_GPCNT0);  in rt_update_raw_counters()
2144 	sc->rx_crc_err	+= RT_READ(sc, CNTR_BASE + GDMA_RX_CSUM_ERCNT0);  in rt_update_raw_counters()
2145 	sc->rx_short_err+= RT_READ(sc, CNTR_BASE + GDMA_RX_SHORT_ERCNT0);  in rt_update_raw_counters()
2146 	sc->rx_long_err	+= RT_READ(sc, CNTR_BASE + GDMA_RX_LONG_ERCNT0);  in rt_update_raw_counters()
2147 	sc->rx_phy_err	+= RT_READ(sc, CNTR_BASE + GDMA_RX_FERCNT0);  in rt_update_raw_counters()
2148 	sc->rx_fifo_overflows+= RT_READ(sc, CNTR_BASE + GDMA_RX_OERCNT0);  in rt_update_raw_counters()
2185 		tmp = RT_READ(sc, sc->pdma_glo_cfg);  in rt_txrx_enable()
2795 	while (RT_READ(sc, MDIO_ACCESS) & MDIO_CMD_ONGO);  in rt_miibus_readreg()
2800 	while (RT_READ(sc, MDIO_ACCESS) & MDIO_CMD_ONGO);  in rt_miibus_readreg()
2802 	return (RT_READ(sc, MDIO_ACCESS) & MDIO_PHY_DATA_MASK);  in rt_miibus_readreg()
2812 	while (RT_READ(sc, MDIO_ACCESS) & MDIO_CMD_ONGO);  in rt_miibus_writereg()
2819 	while (RT_READ(sc, MDIO_ACCESS) & MDIO_CMD_ONGO);  in rt_miibus_writereg()