860 fwohci_start(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
877 	if (&sc->atrq == dbch) {
879 	} else if (&sc->atrs == dbch) {
885 	if (dbch->flags & FWOHCI_DBCH_FULL)
888 	db_tr = dbch->top;
890 	xfer = STAILQ_FIRST(&dbch->xferq.q);
895 	if (dbch->xferq.queued == 0) {
899 	STAILQ_REMOVE_HEAD(&dbch->xferq.q, link);
936 	if (&sc->atrs == dbch) {
954 			err = bus_dmamap_load(dbch->dmat, db_tr->dma_map,
960 			err = bus_dmamap_load_mbuf(dbch->dmat, db_tr->dma_map,
985 		bus_dmamap_sync(dbch->dmat, db_tr->dma_map,
1007 	if (dbch->pdb_tr != NULL) {
1008 		LAST_DB(dbch->pdb_tr, db);
1011 	dbch->xferq.queued++;
1012 	dbch->pdb_tr = db_tr;
1014 	if (db_tr != dbch->bottom) {
1018 		dbch->flags |= FWOHCI_DBCH_FULL;
1022 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREREAD);
1023 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
1025 	if (dbch->xferq.flag & FWXFERQ_RUNNING) {
1031 		OWRITE(sc, OHCI_DMACMD(off), dbch->top->bus_addr | fsegment);
1033 		dbch->xferq.flag |= FWXFERQ_RUNNING;
1036 	dbch->top = db_tr;
1061 fwohci_txd(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
1072 	if (&sc->atrq == dbch) {
1075 	} else if (&sc->atrs == dbch) {
1082 	tr = dbch->bottom;
1084 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_POSTREAD);
1085 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_POSTWRITE);
1086 	while (dbch->xferq.queued > 0) {
1094 		bus_dmamap_sync(dbch->dmat, tr->dma_map,
1096 		bus_dmamap_unload(dbch->dmat, tr->dma_map);
1170 		dbch->xferq.queued--;
1176 		dbch->bottom = tr;
1177 		if (dbch->bottom == dbch->top) {
1179 			if (firewire_debug && dbch->xferq.queued > 0)
1185 	if ((dbch->flags & FWOHCI_DBCH_FULL) && packets > 0) {
1187 		dbch->flags &= ~FWOHCI_DBCH_FULL;
1189 		fwohci_start(sc, dbch);
1196 fwohci_db_free(struct fwohci_dbch *dbch)  argument
1201 	if ((dbch->flags & FWOHCI_DBCH_INIT) == 0)
1204 	for (db_tr = STAILQ_FIRST(&dbch->db_trq), idb = 0; idb < dbch->ndb;
1206 		if ((dbch->xferq.flag & FWXFERQ_EXTBUF) == 0 &&
1208 			fwdma_free_size(dbch->dmat, db_tr->dma_map,
1209 					db_tr->buf, dbch->xferq.psize);
1212 			bus_dmamap_destroy(dbch->dmat, db_tr->dma_map);
1214 	dbch->ndb = 0;
1215 	db_tr = STAILQ_FIRST(&dbch->db_trq);
1216 	fwdma_free_multiseg(dbch->am);
1218 	STAILQ_INIT(&dbch->db_trq);
1219 	dbch->flags &= ~FWOHCI_DBCH_INIT;
1223 fwohci_db_init(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
1228 	if ((dbch->flags & FWOHCI_DBCH_INIT) != 0)
1238 			/*maxsize*/ dbch->xferq.psize,
1239 			/*nsegments*/ dbch->ndesc > 3 ? dbch->ndesc - 2 : 1,
1244 			&dbch->dmat))
1249 	STAILQ_INIT(&dbch->db_trq);
1251 		malloc(sizeof(struct fwohcidb_tr) * dbch->ndb,
1255 	dbch->am = fwdma_malloc_multiseg(&sc->fc, sizeof(struct fwohcidb),
1256 		DB_SIZE(dbch), dbch->ndb, BUS_DMA_WAITOK);
1257 	if (dbch->am == NULL) {
1263 	for (idb = 0; idb < dbch->ndb; idb++) {
1265 		db_tr->db = (struct fwohcidb *)fwdma_v_addr(dbch->am, idb);
1266 		db_tr->bus_addr = fwdma_bus_addr(dbch->am, idb);
1270 		if (bus_dmamap_create(dbch->dmat, 0, &db_tr->dma_map) != 0) {
1272 			dbch->flags = FWOHCI_DBCH_INIT; /* XXX fake */
1273 			fwohci_db_free(dbch);
1276 		STAILQ_INSERT_TAIL(&dbch->db_trq, db_tr, link);
1277 		if (dbch->xferq.flag & FWXFERQ_EXTBUF) {
1278 			if (idb % dbch->xferq.bnpacket == 0)
1279 				dbch->xferq.bulkxfer[idb / dbch->xferq.bnpacket
1281 			if ((idb + 1) % dbch->xferq.bnpacket == 0)
1282 				dbch->xferq.bulkxfer[idb / dbch->xferq.bnpacket
1287 	STAILQ_LAST(&dbch->db_trq, fwohcidb_tr,link)->link.stqe_next
1288 			= STAILQ_FIRST(&dbch->db_trq);
1290 	dbch->xferq.queued = 0;
1291 	dbch->pdb_tr = NULL;
1292 	dbch->top = STAILQ_FIRST(&dbch->db_trq);
1293 	dbch->bottom = dbch->top;
1294 	dbch->flags = FWOHCI_DBCH_INIT;
1338 fwohci_tx_enable(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
1346 	if (!(dbch->xferq.flag & FWXFERQ_EXTBUF)) {
1350 	z = dbch->ndesc;
1352 		if (&sc->it[dmach] == dbch) {
1361 	if (dbch->xferq.flag & FWXFERQ_RUNNING)
1363 	dbch->xferq.flag |= FWXFERQ_RUNNING;
1364 	for (i = 0, dbch->bottom = dbch->top; i < (dbch->ndb - 1); i++) {
1365 		dbch->bottom = STAILQ_NEXT(dbch->bottom, link);
1367 	db_tr = dbch->top;
1368 	for (idb = 0; idb < dbch->ndb; idb++) {
1369 		fwohci_add_tx_buf(dbch, db_tr, idb);
1378 		if (dbch->xferq.flag & FWXFERQ_EXTBUF) {
1379 			if (((idb + 1) % dbch->xferq.bnpacket) == 0) {
1392 		dbch->bottom->db[dbch->bottom->dbcnt - 1].db.desc.depend, 0xf);
1397 fwohci_rx_enable(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
1405 	z = dbch->ndesc;
1406 	if (&sc->arrq == dbch) {
1408 	} else if (&sc->arrs == dbch) {
1412 			if (&sc->ir[dmach] == dbch) {
1422 	if (dbch->xferq.flag & FWXFERQ_STREAM) {
1423 		if (dbch->xferq.flag & FWXFERQ_RUNNING)
1426 		if (dbch->xferq.flag & FWXFERQ_RUNNING) {
1431 	dbch->xferq.flag |= FWXFERQ_RUNNING;
1432 	dbch->top = STAILQ_FIRST(&dbch->db_trq);
1433 	for (i = 0, dbch->bottom = dbch->top; i < (dbch->ndb - 1); i++) {
1434 		dbch->bottom = STAILQ_NEXT(dbch->bottom, link);
1436 	db_tr = dbch->top;
1437 	for (idb = 0; idb < dbch->ndb; idb++) {
1438 		fwohci_add_rx_buf(dbch, db_tr, idb, &sc->dummy_dma);
1445 		if (dbch->xferq.flag & FWXFERQ_EXTBUF) {
1446 			if (((idb + 1) % dbch->xferq.bnpacket) == 0) {
1458 		dbch->bottom->db[db_tr->dbcnt - 1].db.desc.depend, 0xf);
1459 	dbch->buf_offset = 0;
1460 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREREAD);
1461 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
1462 	if (dbch->xferq.flag & FWXFERQ_STREAM) {
1465 		OWRITE(sc, OHCI_DMACMD(off), dbch->top->bus_addr | z);
1508 	struct fwohci_dbch *dbch;  local
1514 	dbch = &sc->it[dmach];
1515 	it = &dbch->xferq;
1519 	if ((dbch->flags & FWOHCI_DBCH_INIT) == 0) {
1520 		dbch->ndb = it->bnpacket * it->bnchunk;
1521 		dbch->ndesc = 3;
1522 		fwohci_db_init(sc, dbch);
1523 		if ((dbch->flags & FWOHCI_DBCH_INIT) == 0)
1526 		err = fwohci_tx_enable(sc, dbch);
1531 	ldesc = dbch->ndesc - 1;
1550 				(chunk->start))->bus_addr | dbch->ndesc;
1552 			FWOHCI_DMA_SET(db[0].db.desc.depend, dbch->ndesc);
1553 			FWOHCI_DMA_SET(db[ldesc].db.desc.depend, dbch->ndesc);
1561 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
1562 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREREAD);
1581 		((struct fwohcidb_tr *)(first->start))->bus_addr | dbch->ndesc);
1630 	struct fwohci_dbch *dbch;  local
1635 	dbch = &sc->ir[dmach];
1636 	ir = &dbch->xferq;
1644 		dbch->ndb = ir->bnpacket * ir->bnchunk;
1645 		dbch->ndesc = 2;
1646 		fwohci_db_init(sc, dbch);
1647 		if ((dbch->flags & FWOHCI_DBCH_INIT) == 0)
1649 		err = fwohci_rx_enable(sc, dbch);
1660 	ldesc = dbch->ndesc - 1;
1672 			err = bus_dmamap_load_mbuf(dbch->dmat, db_tr->dma_map,
1685 			FWOHCI_DMA_SET(db[ldesc].db.desc.depend, dbch->ndesc);
1693 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
1694 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREREAD);
1713 							| dbch->ndesc);
1929 			struct fwohci_dbch *dbch;  local
1932 				dbch = &sc->ir[i];
1933 				if ((dbch->xferq.flag & FWXFERQ_OPEN) == 0) {
2296 	struct fwohci_dbch *dbch;  local
2304 		dbch = &sc->atrq;
2307 		dbch = &sc->atrs;
2310 		dbch = &sc->arrq;
2313 		dbch = &sc->arrs;
2316 		dbch = &sc->it[ch - ITX_CH];
2319 		dbch = &sc->ir[ch - IRX_CH];
2323 	if (dbch->ndb == 0) {
2327 	pp = dbch->top;
2329 	for (idb = 0; idb < dbch->ndb; idb++) {
2336 		for (jdb = 0; jdb < dbch->ndesc; jdb++) {
2358 		print_db(pp, prev, ch, dbch->ndesc);
2361 		print_db(cp, curr, ch, dbch->ndesc);
2364 		print_db(np, next, ch, dbch->ndesc);
2493 	struct fwohci_dbch *dbch;  local
2502 	dbch = &sc->it[dmach];
2510 	for (idb = 0; idb < dbch->xferq.bnpacket; idb++) {
2532 			= db[dbch->ndesc - 1].db.desc.depend
2533 			= STAILQ_NEXT(db_tr, link)->bus_addr | dbch->ndesc;
2535 		FWOHCI_DMA_SET(db[0].db.desc.depend, dbch->ndesc);
2536 		FWOHCI_DMA_SET(db[dbch->ndesc - 1].db.desc.depend, dbch->ndesc);
2543 	FWOHCI_DMA_CLEAR(db[dbch->ndesc - 1].db.desc.depend, 0xf);
2545 	db[dbch->ndesc - 1].db.desc.control |= OHCI_INTERRUPT_ALWAYS;
2558 fwohci_add_tx_buf(struct fwohci_dbch *dbch, struct fwohcidb_tr *db_tr,  argument
2565 	it = &dbch->xferq;
2590 fwohci_add_rx_buf(struct fwohci_dbch *dbch, struct fwohcidb_tr *db_tr,  argument
2599 	ir = &dbch->xferq;
2600 	if (ir->buf == NULL && (dbch->xferq.flag & FWXFERQ_EXTBUF) == 0) {
2602 			db_tr->buf = fwdma_malloc_size(dbch->dmat,
2610 		bus_dmamap_sync(dbch->dmat, db_tr->dma_map,
2691 fwohci_get_plen(struct fwohci_softc *sc, struct fwohci_dbch *dbch, struct fw_pkt *fp)  argument
2708 	if (r > dbch->xferq.psize) {
2718 fwohci_arcv_free_buf(struct fwohci_softc *sc, struct fwohci_dbch *dbch,  argument
2724 	FWOHCI_DMA_WRITE(db->db.desc.res, dbch->xferq.psize);
2725 	FWOHCI_DMA_SET(dbch->bottom->db[0].db.desc.depend, 1);
2726 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
2727 	dbch->bottom = db_tr;
2734 fwohci_arcv(struct fwohci_softc *sc, struct fwohci_dbch *dbch, int count)  argument
2749 	if (&sc->arrq == dbch) {
2751 	} else if (&sc->arrs == dbch) {
2758 	db_tr = dbch->top;
2761 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_POSTREAD);
2762 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_POSTWRITE);
2772 		len = dbch->xferq.psize - resCount;
2774 		if (dbch->pdb_tr == NULL) {
2775 			len -= dbch->buf_offset;
2776 			ld += dbch->buf_offset;
2779 			bus_dmamap_sync(dbch->dmat, db_tr->dma_map,
2784 			if (dbch->pdb_tr != NULL) {
2788 				offset = dbch->buf_offset;
2791 				buf = dbch->pdb_tr->buf + offset;
2792 				rlen = dbch->xferq.psize - offset;
2795 						rlen, dbch->buf_offset);
2796 				if (dbch->buf_offset < 0) {
2833 					dbch->pdb_tr = db_tr;
2834 					dbch->buf_offset = - dbch->buf_offset;
2846 			plen = fwohci_get_plen(sc, dbch, fp) - offset;
2857 					dbch->pdb_tr = db_tr;
2874 			dbch->buf_offset = ld - (uint8_t *)db_tr->buf;
2917 				    dbch->buf_offset, len,
2926 			if (dbch->pdb_tr != NULL) {
2927 				fwohci_arcv_free_buf(sc, dbch, dbch->pdb_tr,
2929 				dbch->pdb_tr = NULL;
2936 			if (dbch->pdb_tr == NULL) {
2937 				fwohci_arcv_free_buf(sc, dbch, db_tr, off, 1);
2938 				dbch->buf_offset = 0;
2940 				if (dbch->pdb_tr != db_tr)
2948 			dbch->top = db_tr;
2950 			dbch->buf_offset = dbch->xferq.psize - resCount;
2965 	dbch->pdb_tr = NULL;
2970 		fwohci_arcv_free_buf(sc, dbch, db_tr, off, 0);
2976 	dbch->top = db_tr;
2977 	dbch->buf_offset = dbch->xferq.psize - resCount;