2091 	uint32_t xmac_base;  in elink_update_pfc_xmac()  local
2095 	xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in elink_update_pfc_xmac()
2121 		REG_WR(sc, xmac_base + XMAC_REG_PAUSE_CTRL, pause_val);  in elink_update_pfc_xmac()
2122 		REG_WR(sc, xmac_base + XMAC_REG_PFC_CTRL, pfc0_val);  in elink_update_pfc_xmac()
2123 		REG_WR(sc, xmac_base + XMAC_REG_PFC_CTRL_HI, pfc1_val);  in elink_update_pfc_xmac()
2129 	REG_WR(sc, xmac_base + XMAC_REG_PAUSE_CTRL, pause_val);  in elink_update_pfc_xmac()
2130 	REG_WR(sc, xmac_base + XMAC_REG_PFC_CTRL, pfc0_val);  in elink_update_pfc_xmac()
2131 	REG_WR(sc, xmac_base + XMAC_REG_PFC_CTRL_HI, pfc1_val);  in elink_update_pfc_xmac()
2135 	REG_WR(sc, xmac_base + XMAC_REG_CTRL_SA_LO,  in elink_update_pfc_xmac()
2140 	REG_WR(sc, xmac_base + XMAC_REG_CTRL_SA_HI,  in elink_update_pfc_xmac()
2498 	uint32_t pfc_ctrl, xmac_base = (port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in elink_set_xmac_rxtx()  local
2507 		pfc_ctrl = REG_RD(sc, xmac_base + XMAC_REG_PFC_CTRL_HI);  in elink_set_xmac_rxtx()
2508 		REG_WR(sc, xmac_base + XMAC_REG_PFC_CTRL_HI,  in elink_set_xmac_rxtx()
2510 		REG_WR(sc, xmac_base + XMAC_REG_PFC_CTRL_HI,  in elink_set_xmac_rxtx()
2513 		val = REG_RD(sc, xmac_base + XMAC_REG_CTRL);  in elink_set_xmac_rxtx()
2518 		REG_WR(sc, xmac_base + XMAC_REG_CTRL, val);  in elink_set_xmac_rxtx()
2525 	uint32_t val, xmac_base;  in elink_xmac_enable()  local
2529 	xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in elink_xmac_enable()
2546 		REG_WR(sc, xmac_base + XMAC_REG_RX_LSS_CTRL,  in elink_xmac_enable()
2549 		REG_WR(sc, xmac_base + XMAC_REG_CLEAR_RX_LSS_STATUS, 0);  in elink_xmac_enable()
2550 		REG_WR(sc, xmac_base + XMAC_REG_CLEAR_RX_LSS_STATUS,  in elink_xmac_enable()
2555 	REG_WR(sc, xmac_base + XMAC_REG_RX_MAX_SIZE, 0x2710);  in elink_xmac_enable()
2558 	REG_WR(sc, xmac_base + XMAC_REG_TX_CTRL, 0xC800);  in elink_xmac_enable()
2565 		REG_WR(sc, xmac_base + XMAC_REG_EEE_TIMERS_HI, 0x1380008);  in elink_xmac_enable()
2566 		REG_WR(sc, xmac_base + XMAC_REG_EEE_CTRL, 0x1);  in elink_xmac_enable()
2568 		REG_WR(sc, xmac_base + XMAC_REG_EEE_CTRL, 0x0);  in elink_xmac_enable()
2583 	REG_WR(sc, xmac_base + XMAC_REG_CTRL, val);  in elink_xmac_enable()
14166 		uint32_t xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in elink_link_reset()  local
14170 			REG_WR(sc, xmac_base + XMAC_REG_CTRL,  in elink_link_reset()