Lines Matching refs:uint16_t
331 uint16_t link_speed;
332 uint16_t support_speeds;
333 uint16_t auto_link_speeds;
334 uint16_t auto_link_speed;
335 uint16_t force_link_speed;
343 uint16_t req_link_speed;
361 uint16_t max_rsscos_ctxs;
362 uint16_t max_cp_rings;
363 uint16_t max_tx_rings;
364 uint16_t max_rx_rings;
365 uint16_t max_hw_ring_grps;
366 uint16_t max_irqs;
367 uint16_t max_l2_ctxs;
368 uint16_t max_vnics;
369 uint16_t max_stat_ctxs;
377 uint16_t active_vfs;
378 uint16_t max_vfs;
386 uint16_t hwrm_cmd_req_pages;
392 uint16_t fw_fid;
394 uint16_t max_rsscos_ctxs;
395 uint16_t max_cp_rings;
396 uint16_t max_tx_rings;
397 uint16_t max_rx_rings;
398 uint16_t max_hw_ring_grps;
399 uint16_t max_l2_ctxs;
400 uint16_t max_irqs;
401 uint16_t max_vnics;
402 uint16_t max_stat_ctxs;
421 uint16_t tpid;
422 uint16_t tag;
426 uint16_t id;
427 uint16_t def_ring_grp;
428 uint16_t cos_rule;
429 uint16_t lb_rule;
430 uint16_t mru;
446 uint16_t rss_id;
456 uint16_t stats_ctx;
457 uint16_t grp_id;
458 uint16_t rx_ring_id;
459 uint16_t cp_ring_id;
460 uint16_t ag_ring_id;
469 uint16_t id; /* Logical ID */
470 uint16_t phys_id;
514 uint16_t chip_num;
529 uint16_t mfg_id;
530 uint16_t device_id;
541 uint16_t alloc_completion_rings;
542 uint16_t alloc_tx_rings;
543 uint16_t alloc_rx_rings;
544 uint16_t alloc_vnics;
548 uint16_t enable;
549 uint16_t is_mode_gro;
550 uint16_t max_agg_segs;
551 uint16_t max_aggs;
577 uint16_t hwrm_cmd_seq;
584 uint16_t hwrm_max_req_len;
627 uint16_t rx_coal_usecs;
628 uint16_t rx_coal_usecs_irq;
629 uint16_t rx_coal_frames;
630 uint16_t rx_coal_frames_irq;
631 uint16_t tx_coal_usecs;
632 uint16_t tx_coal_usecs_irq;
633 uint16_t tx_coal_frames;
634 uint16_t tx_coal_frames_irq;
646 #define INVALID_MAC_INDEX ((uint16_t)-1)
647 uint16_t mac_index;
654 uint16_t l2_ovlan;
655 uint16_t l2_ovlan_mask;
656 uint16_t l2_ivlan;
657 uint16_t l2_ivlan_mask;
660 uint16_t t_l2_ovlan;
661 uint16_t t_l2_ovlan_mask;
662 uint16_t t_l2_ivlan;
663 uint16_t t_l2_ivlan_mask;
665 uint16_t mirror_vnic_id;