Lines Matching refs:HBF_MessageUnit

1197 			CHIP_REG_WRITE32(HBF_MessageUnit, 0, inbound_queueport_high, 0);  in arcmsr_post_srb()
1198 			CHIP_REG_WRITE32(HBF_MessageUnit, 0, inbound_queueport_low, ccb_post_stamp);  in arcmsr_post_srb()
2261 	CHIP_REG_WRITE32(HBF_MessageUnit, 0, reply_post_consumer_index, doneq_index);  in arcmsr_hbf_postqueue_isr()
2434 	host_interrupt_status = CHIP_REG_READ32(HBF_MessageUnit, 0, host_int_status) &  in arcmsr_handle_hbf_isr()
2450 		host_interrupt_status = CHIP_REG_READ32(HBF_MessageUnit, 0, host_int_status);  in arcmsr_handle_hbf_isr()
2530 		u_int32_t outMsg1 = CHIP_REG_READ32(HBF_MessageUnit, 0, outbound_msgaddr1);  in arcmsr_polling_devmap()
2534 		CHIP_REG_WRITE32(HBF_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);  in arcmsr_polling_devmap()
2536 		CHIP_REG_WRITE32(HBF_MessageUnit, 0, iobound_doorbell, acb->out_doorbell);  in arcmsr_polling_devmap()
4036 	CHIP_REG_WRITE32(HBF_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);  in arcmsr_get_hbf_config()
4364 			CHIP_REG_WRITE32(HBF_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_SET_CONFIG);  in arcmsr_iop_confirm()
4366 			CHIP_REG_WRITE32(HBF_MessageUnit, 0, iobound_doorbell, acb->out_doorbell);  in arcmsr_iop_confirm()
4870 		CHIP_REG_WRITE32(HBF_MessageUnit, 0, host_int_status, 0); /*clear interrupt*/  in arcmsr_initialize()
4871 …CHIP_REG_WRITE32(HBF_MessageUnit, 0, iobound_doorbell, ARCMSR_HBEMU_DOORBELL_SYNC); /* synchronize…  in arcmsr_initialize()
4874 …CHIP_REG_WRITE32(HBF_MessageUnit, 0, inbound_msgaddr0, (u_int32_t)(host_buffer_dma | 1));  /* host…  in arcmsr_initialize()
4875 …CHIP_REG_WRITE32(HBF_MessageUnit, 0, inbound_msgaddr1, (u_int32_t)((host_buffer_dma >> 16) >> 16))…  in arcmsr_initialize()
4876 …CHIP_REG_WRITE32(HBF_MessageUnit, 0, iobound_doorbell, ARCMSR_HBFMU_DOORBELL_SYNC1);       /* set …  in arcmsr_initialize()