62 agp_intel_match(device_t dev)  in agp_intel_match()  argument
64 	if (pci_get_class(dev) != PCIC_BRIDGE  in agp_intel_match()
65 	    || pci_get_subclass(dev) != PCIS_BRIDGE_HOST)  in agp_intel_match()
68 	if (agp_find_caps(dev) == 0)  in agp_intel_match()
71 	switch (pci_get_devid(dev)) {  in agp_intel_match()
116 agp_intel_probe(device_t dev)  in agp_intel_probe()  argument
120 	if (resource_disabled("agp", device_get_unit(dev)))  in agp_intel_probe()
122 	desc = agp_intel_match(dev);  in agp_intel_probe()
124 		device_set_desc(dev, desc);  in agp_intel_probe()
132 agp_intel_commit_gatt(device_t dev)  in agp_intel_commit_gatt()  argument
138 	sc = device_get_softc(dev);  in agp_intel_commit_gatt()
139 	type = pci_get_devid(dev);  in agp_intel_commit_gatt()
142 	pci_write_config(dev, AGP_INTEL_ATTBASE, sc->gatt->ag_physical, 4);  in agp_intel_commit_gatt()
147 		pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2080, 4);  in agp_intel_commit_gatt()
154 		pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4);  in agp_intel_commit_gatt()
157 		value = pci_read_config(dev, AGP_INTEL_AGPCTRL, 4);  in agp_intel_commit_gatt()
158 		pci_write_config(dev, AGP_INTEL_AGPCTRL, value | 0x80, 4);  in agp_intel_commit_gatt()
165 		pci_write_config(dev, AGP_INTEL_I820_RDCR,  in agp_intel_commit_gatt()
166 				 (pci_read_config(dev, AGP_INTEL_I820_RDCR, 1)  in agp_intel_commit_gatt()
175 		pci_write_config(dev, AGP_INTEL_I845_AGPM,  in agp_intel_commit_gatt()
176 				 (pci_read_config(dev, AGP_INTEL_I845_AGPM, 1)  in agp_intel_commit_gatt()
184 		pci_write_config(dev, AGP_INTEL_MCHCFG,  in agp_intel_commit_gatt()
185 				 (pci_read_config(dev, AGP_INTEL_MCHCFG, 2)  in agp_intel_commit_gatt()
189 		pci_write_config(dev, AGP_INTEL_NBXCFG,  in agp_intel_commit_gatt()
190 				 (pci_read_config(dev, AGP_INTEL_NBXCFG, 4)  in agp_intel_commit_gatt()
197 		pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0xc000, 2);  in agp_intel_commit_gatt()
210 		pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0x00ff, 2);  in agp_intel_commit_gatt()
213 		pci_write_config(dev, AGP_INTEL_ERRSTS + 1, 7, 1);  in agp_intel_commit_gatt()
218 agp_intel_attach(device_t dev)  in agp_intel_attach()  argument
225 	sc = device_get_softc(dev);  in agp_intel_attach()
227 	error = agp_generic_attach(dev);  in agp_intel_attach()
232 	value = pci_read_config(dev, AGP_INTEL_APSIZE, 1);  in agp_intel_attach()
233 	pci_write_config(dev, AGP_INTEL_APSIZE, MAX_APSIZE, 1);  in agp_intel_attach()
234 	sc->aperture_mask = pci_read_config(dev, AGP_INTEL_APSIZE, 1) &  in agp_intel_attach()
236 	pci_write_config(dev, AGP_INTEL_APSIZE, value, 1);  in agp_intel_attach()
237 	sc->current_aperture = sc->initial_aperture = AGP_GET_APERTURE(dev);  in agp_intel_attach()
240 		gatt = agp_alloc_gatt(dev);  in agp_intel_attach()
248 		if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) {  in agp_intel_attach()
249 			agp_generic_detach(dev);  in agp_intel_attach()
255 	agp_intel_commit_gatt(dev);  in agp_intel_attach()
261 agp_intel_detach(device_t dev)  in agp_intel_detach()  argument
266 	sc = device_get_softc(dev);  in agp_intel_detach()
268 	agp_free_cdev(dev);  in agp_intel_detach()
271 	switch (pci_get_devid(dev)) {  in agp_intel_detach()
274 		reg = pci_read_config(dev, AGP_INTEL_I820_RDCR, 1) & ~(1 << 1);  in agp_intel_detach()
276 		pci_write_config(dev, AGP_INTEL_I820_RDCR, reg, 1);  in agp_intel_detach()
284 		reg = pci_read_config(dev, AGP_INTEL_I845_AGPM, 1) & ~(1 << 1);  in agp_intel_detach()
286 		pci_write_config(dev, AGP_INTEL_I845_AGPM, reg, 1);  in agp_intel_detach()
293 		reg = pci_read_config(dev, AGP_INTEL_MCHCFG, 2) & ~(1 << 9);  in agp_intel_detach()
295 		pci_write_config(dev, AGP_INTEL_MCHCFG, reg, 2);  in agp_intel_detach()
298 		reg = pci_read_config(dev, AGP_INTEL_NBXCFG, 4) & ~(1 << 9);  in agp_intel_detach()
300 		pci_write_config(dev, AGP_INTEL_NBXCFG, reg, 4);  in agp_intel_detach()
302 	pci_write_config(dev, AGP_INTEL_ATTBASE, 0, 4);  in agp_intel_detach()
303 	AGP_SET_APERTURE(dev, sc->initial_aperture);  in agp_intel_detach()
305 	agp_free_res(dev);  in agp_intel_detach()
311 agp_intel_resume(device_t dev)  in agp_intel_resume()  argument
314 	sc = device_get_softc(dev);  in agp_intel_resume()
316 	AGP_SET_APERTURE(dev, sc->current_aperture);  in agp_intel_resume()
317 	agp_intel_commit_gatt(dev);  in agp_intel_resume()
318 	return (bus_generic_resume(dev));  in agp_intel_resume()
322 agp_intel_get_aperture(device_t dev)  in agp_intel_get_aperture()  argument
327 	sc = device_get_softc(dev);  in agp_intel_get_aperture()
329 	apsize = pci_read_config(dev, AGP_INTEL_APSIZE, 1) & sc->aperture_mask;  in agp_intel_get_aperture()
342 agp_intel_set_aperture(device_t dev, u_int32_t aperture)  in agp_intel_set_aperture()  argument
347 	sc = device_get_softc(dev);  in agp_intel_set_aperture()
362 	pci_write_config(dev, AGP_INTEL_APSIZE, apsize, 1);  in agp_intel_set_aperture()
368 agp_intel_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)  in agp_intel_bind_page()  argument
372 	sc = device_get_softc(dev);  in agp_intel_bind_page()
382 agp_intel_unbind_page(device_t dev, vm_offset_t offset)  in agp_intel_unbind_page()  argument
386 	sc = device_get_softc(dev);  in agp_intel_unbind_page()
396 agp_intel_flush_tlb(device_t dev)  in agp_intel_flush_tlb()  argument
400 	val = pci_read_config(dev, AGP_INTEL_AGPCTRL, 4);  in agp_intel_flush_tlb()
401 	pci_write_config(dev, AGP_INTEL_AGPCTRL, val & ~(1 << 7), 4);  in agp_intel_flush_tlb()
402 	pci_write_config(dev, AGP_INTEL_AGPCTRL, val, 4);  in agp_intel_flush_tlb()