224 		v = CSR_READ_4(sc, AGE_MDIO);  in age_miibus_readreg()
254 		v = CSR_READ_4(sc, AGE_MDIO);  in age_miibus_writereg()
345 	reg = CSR_READ_4(sc, AGE_SPI_CTRL);  in age_get_macaddr()
357 		CSR_WRITE_4(sc, AGE_TWSI_CTRL, CSR_READ_4(sc, AGE_TWSI_CTRL) |  in age_get_macaddr()
361 			reg = CSR_READ_4(sc, AGE_TWSI_CTRL);  in age_get_macaddr()
374 	ea[0] = CSR_READ_4(sc, AGE_PAR0);  in age_get_macaddr()
375 	ea[1] = CSR_READ_4(sc, AGE_PAR1);  in age_get_macaddr()
501 	sc->age_chip_rev = CSR_READ_4(sc, AGE_MASTER_CFG) >>  in age_attach()
525 	    CSR_READ_4(sc, AGE_SRAM_TX_FIFO_LEN),  in age_attach()
526 	    CSR_READ_4(sc, AGE_SRAM_RX_FIFO_LEN));  in age_attach()
1428 	reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_setwol()
1886 			reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_ioctl()
1940 	reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_mac_config()
2006 		reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_link_task()
2008 		CSR_WRITE_4(sc, AGE_DMA_CFG, CSR_READ_4(sc, AGE_DMA_CFG) |  in age_link_task()
2124 	status = CSR_READ_4(sc, AGE_INTR_STATUS);  in age_intr()
2539 	CSR_READ_4(sc, AGE_MASTER_CFG);  in age_reset()
2542 		if ((reg = CSR_READ_4(sc, AGE_IDLE_STATUS)) == 0)  in age_reset()
2551 	CSR_WRITE_4(sc, 0x1008, CSR_READ_4(sc, 0x1008) | 0x8000);  in age_reset()
2670 	reg = CSR_READ_4(sc, AGE_MASTER_CFG);  in age_init_locked()
2711 		CSR_WRITE_4(sc, 0x1008, CSR_READ_4(sc, 0x1008) | 0x8000);  in age_init_locked()
2731 		reg = CSR_READ_4(sc, AGE_SRAM_RX_FIFO_LEN);  in age_init_locked()
2738 		reg = CSR_READ_4(sc, AGE_SRAM_RRD_LEN);  in age_init_locked()
2826 	reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_init_locked()
2878 	    CSR_READ_4(sc, AGE_DMA_CFG) & ~(DMA_CFG_RD_ENB | DMA_CFG_WR_ENB));  in age_stop()
2881 	    CSR_READ_4(sc, AGE_TXQ_CFG) & ~TXQ_CFG_ENB);  in age_stop()
2883 	    CSR_READ_4(sc, AGE_RXQ_CFG) & ~RXQ_CFG_ENB);  in age_stop()
2885 		if ((reg = CSR_READ_4(sc, AGE_IDLE_STATUS)) == 0)  in age_stop()
2932 	reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_stop_txmac()
2938 	reg = CSR_READ_4(sc, AGE_DMA_CFG);  in age_stop_txmac()
2944 		if ((CSR_READ_4(sc, AGE_IDLE_STATUS) &  in age_stop_txmac()
2961 	reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_stop_rxmac()
2967 	reg = CSR_READ_4(sc, AGE_DMA_CFG);  in age_stop_rxmac()
2973 		if ((CSR_READ_4(sc, AGE_IDLE_STATUS) &  in age_stop_rxmac()
3134 	reg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_rxvlan()
3164 	rxcfg = CSR_READ_4(sc, AGE_MAC_CFG);  in age_rxfilter()