Lines Matching refs:iAddr
17773 int iAddr; /* Subroutine entry address */ member
67148 int iAddr = hdr + 1; /* Address of ptr to pc */
67149 int pc = get2byte(&aData[iAddr]); /* Address of a free slot */
67170 memcpy(&aData[iAddr], &aData[pc], 2);
67183 iAddr = pc;
67185 if( pc<=iAddr+size ){
79800 int iAddr; /* Address of next instruction to return */
79818 assert( p->iAddr<nOp );
79820 pRet = &aOp[p->iAddr];
79821 p->iAddr++;
79822 if( p->iAddr==nOp ){
79824 p->iAddr = 0;
88906 int iAddr;
88907 for(iAddr = (int)(pOp - aOp) - 1; ALWAYS(iAddr>=0); iAddr--){
88908 if( aOp[iAddr].opcode==OP_ReleaseReg ) continue;
88909 assert( aOp[iAddr].opcode==OP_Lt || aOp[iAddr].opcode==OP_Gt );
89163 u32 iAddr; /* Address of this instruction */
89166 iAddr = (int)(pOp - p->aOp);
89167 if( (p->pFrame->aOnce[iAddr/8] & (1<<(iAddr & 7)))!=0 ){
89171 p->pFrame->aOnce[iAddr/8] |= 1<<(iAddr & 7);
98497 int iAddr; /* Address */
98632 &pCur->iAddr,
98661 Op *pOp = pCur->aOp + pCur->iAddr;
98697 sqlite3_result_int(ctx, pCur->iAddr);
98733 if( pCur->iRowid==pCur->iAddr+1 ){
98785 pCur->iAddr = 0;
104378 int iAddr = sqlite3VdbeAddOp0(v, OP_Once);
104385 sqlite3VdbeJumpHere(v, iAddr);
104464 int iAddr = sqlite3VdbeAddOp0(v, OP_Once); VdbeCoverage(v);
104484 sqlite3VdbeJumpHere(v, iAddr);
104668 pExpr->y.sub.iAddr);
104679 pExpr->y.sub.iAddr =
104804 sqlite3VdbeChangeP1(v, pExpr->y.sub.iAddr-1, sqlite3VdbeCurrentAddr(v)-1);
104848 pExpr->y.sub.iAddr);
104857 pExpr->y.sub.iAddr =
104936 sqlite3VdbeChangeP1(v, pExpr->y.sub.iAddr-1, sqlite3VdbeCurrentAddr(v)-1);
105335 int iAddr;
105340 iAddr = sqlite3VdbeAddOp3(v, OP_IfNullRow, pParse->iSelfTab-1, 0, regOut);
105342 iAddr = 0;
105348 if( iAddr ) sqlite3VdbeJumpHere(v, iAddr);
130296 int iAddr = sqlite3VdbeCurrentAddr(v);
130302 aOp[2].p2 = iAddr+4;