Lines Matching refs:CodeGenProcModel
95 unsigned EmitRegisterFileTables(const CodeGenProcModel &ProcModel,
97 void EmitLoadStoreQueueInfo(const CodeGenProcModel &ProcModel,
99 void EmitExtraProcessorInfo(const CodeGenProcModel &ProcModel,
103 void EmitProcessorResourceSubUnits(const CodeGenProcModel &ProcModel,
105 void EmitProcessorResources(const CodeGenProcModel &ProcModel,
108 const CodeGenProcModel &ProcModel);
110 const CodeGenProcModel &ProcModel);
112 const CodeGenProcModel &ProcModel);
113 void GenSchedClassTables(const CodeGenProcModel &ProcModel,
385 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitStageAndOperandCycleData()
438 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitStageAndOperandCycleData()
621 const CodeGenProcModel &ProcModel, raw_ostream &OS) { in EmitProcessorResourceSubUnits()
643 static void EmitRetireControlUnitInfo(const CodeGenProcModel &ProcModel, in EmitRetireControlUnitInfo()
657 static void EmitRegisterFileInfo(const CodeGenProcModel &ProcModel, in EmitRegisterFileInfo()
674 SubtargetEmitter::EmitRegisterFileTables(const CodeGenProcModel &ProcModel, in EmitRegisterFileTables()
726 void SubtargetEmitter::EmitLoadStoreQueueInfo(const CodeGenProcModel &ProcModel, in EmitLoadStoreQueueInfo()
746 void SubtargetEmitter::EmitExtraProcessorInfo(const CodeGenProcModel &ProcModel, in EmitExtraProcessorInfo()
770 void SubtargetEmitter::EmitProcessorResources(const CodeGenProcModel &ProcModel, in EmitProcessorResources()
828 const CodeGenSchedRW &SchedWrite, const CodeGenProcModel &ProcModel) { in FindWriteResources()
881 const CodeGenProcModel &ProcModel) { in FindReadAdvance()
934 const CodeGenProcModel &PM) { in ExpandProcResources()
979 void SubtargetEmitter::GenSchedClassTables(const CodeGenProcModel &ProcModel, in GenSchedClassTables()
1335 for (const CodeGenProcModel &PM : SchedModels.procModels()) { in EmitProcessorModels()
1413 for (const CodeGenProcModel &ProcModel : SchedModels.procModels()) { in EmitSchedModel()