Lines Matching refs:TheDef

121         StringRef InstName = Inst->TheDef->getName();  in apply()
124 Elts.insert(Inst->TheDef); in apply()
134 return LHS->TheDef->getName() < RHS; in apply()
137 return LHS < RHS->TheDef->getName() && in apply()
138 !RHS->TheDef->getName().startswith(LHS); in apply()
149 StringRef InstName = Inst->TheDef->getName(); in apply()
151 Elts.insert(Inst->TheDef); in apply()
597 Record *SchedDef = Inst->TheDef; in collectSchedRW()
673 findRWs(CGRW.TheDef->getValueAsListOfDefs("Writes"), CGRW.Sequence, in collectSchedRW()
724 RWVec, [Def](const CodeGenSchedRW &RW) { return RW.TheDef == Def; }); in getSchedRWIdx()
730 Record *ReadDef = Read.TheDef; in hasReadOfWrite()
782 SchedRW.TheDef ? SchedRW.TheDef->getValueAsInt("Repeat") : 1; in expandRWSequence()
806 PrintFatalError(AliasRW.TheDef->getLoc(), "Multiple aliases " in expandRWSeqForProc()
809 AliasDef = AliasRW.TheDef; in expandRWSeqForProc()
821 SchedWrite.TheDef ? SchedWrite.TheDef->getValueAsInt("Repeat") : 1; in expandRWSeqForProc()
873 Record *ItinDef = Inst->TheDef->getValueAsDef("Itinerary"); in collectSchedClasses()
875 if (!Inst->TheDef->isValueUnset("SchedRW")) in collectSchedClasses()
876 findRWs(Inst->TheDef->getValueAsListOfDefs("SchedRW"), Writes, Reads); in collectSchedClasses()
880 InstrClassMap[Inst->TheDef] = SCIdx; in collectSchedClasses()
900 StringRef InstName = Inst->TheDef->getName(); in collectSchedClasses()
905 dbgs() << "No machine model for " << Inst->TheDef->getName() << '\n'; in collectSchedClasses()
911 PrintFatalError(Inst->TheDef->getLoc(), "Instruction's sched class " in collectSchedClasses()
955 dbgs() << "No machine model for " << Inst->TheDef->getName() in collectSchedClasses()
966 return InstrClassMap.lookup(Inst.TheDef); in getSchedClassIdx()
1372 RecVec Variants = SchedRW.TheDef->getValueAsListOfDefs("Variants"); in mutuallyExclusive()
1432 if (SchedRW.TheDef->getValueInit("SchedModel")->isComplete()) { in getIntersectingVariants()
1433 Record *ModelDef = SchedRW.TheDef->getValueAsDef("SchedModel"); in getIntersectingVariants()
1438 const RecVec VarDefs = SchedRW.TheDef->getValueAsListOfDefs("Variants"); in getIntersectingVariants()
1470 const RecVec VarDefs = AliasRW.TheDef->getValueAsListOfDefs("Variants"); in getIntersectingVariants()
1475 Variants.emplace_back(AliasRW.TheDef, SchedRW.Index, AliasProcIdx, 0); in getIntersectingVariants()
1503 PrintFatalError(SchedRW.TheDef->getLoc(), "No variant of this type has " in getIntersectingVariants()
1988 if (Inst->TheDef->isValueUnset("SchedRW") && !HadCompleteModel) { in checkCompleteness()
1989 PrintError(Inst->TheDef->getLoc(), in checkCompleteness()
1991 Inst->TheDef->getName() + "' in SchedMachineModel '" + in checkCompleteness()
2010 PrintError(Inst->TheDef->getLoc(), "'" + ProcModel.ModelName + in checkCompleteness()
2012 Inst->TheDef->getName() + "'"); in checkCompleteness()
2057 if (SchedRW.TheDef) { in collectRWResources()
2058 if (!IsRead && SchedRW.TheDef->isSubClassOf("SchedWriteRes")) { in collectRWResources()
2060 addWriteRes(SchedRW.TheDef, Idx); in collectRWResources()
2062 else if (IsRead && SchedRW.TheDef->isSubClassOf("SchedReadAdvance")) { in collectRWResources()
2064 addReadAdvance(SchedRW.TheDef, Idx); in collectRWResources()
2194 for (const Record *TheDef : UnsupportedFeaturesDefs) { in isUnsupported() local
2195 for (const Record *PredDef : Inst.TheDef->getValueAsListOfDefs("Predicates")) { in isUnsupported()
2196 if (TheDef->getName() == PredDef->getName()) in isUnsupported()