Lines Matching refs:RC
947 CodeGenRegisterClass &RC = *I; in computeSubClasses() local
948 RC.SubClasses.resize(RegClasses.size()); in computeSubClasses()
949 RC.SubClasses.set(RC.EnumValue); in computeSubClasses()
950 if (RC.Artificial) in computeSubClasses()
956 if (RC.SubClasses.test(SubRC.EnumValue)) in computeSubClasses()
958 if (!testSubClass(&RC, &SubRC)) in computeSubClasses()
962 RC.SubClasses |= SubRC.SubClasses; in computeSubClasses()
966 for (auto I2 = std::next(I); I2 != E && testSubClass(&RC, &*I2); ++I2) in computeSubClasses()
967 RC.SubClasses.set(I2->EnumValue); in computeSubClasses()
971 for (auto &RC : RegClasses) { in computeSubClasses() local
972 const BitVector &SC = RC.getSubClasses(); in computeSubClasses()
978 if (&*I == &RC) in computeSubClasses()
980 I->SuperClasses.push_back(&RC); in computeSubClasses()
987 for (auto &RC : RegClasses) in computeSubClasses() local
988 if (!RC.getDef()) in computeSubClasses()
989 RC.inheritProperties(RegBank); in computeSubClasses()
1015 for (auto &RC : RegClasses) in getMatchingSubClassWithSubRegs() local
1016 if (SuperRegRCsBV[RC.EnumValue]) in getMatchingSubClassWithSubRegs()
1017 SuperRegRCs.emplace_back(&RC); in getMatchingSubClassWithSubRegs()
1025 for (auto &RC: RegClasses) { in getMatchingSubClassWithSubRegs() local
1027 RC.getSuperRegClasses(SubIdx, SuperRegClassesBV); in getMatchingSubClassWithSubRegs()
1029 SuperRegClasses.push_back(std::make_pair(&RC, SuperRegClassesBV)); in getMatchingSubClassWithSubRegs()
1083 for (CodeGenRegisterClass *RC : FindI->second) in getSuperRegClasses()
1084 Out.set(RC->EnumValue); in getSuperRegClasses()
1137 for (Record *RC : TupRegs) in CodeGenRegBank()
1138 getReg(RC); in CodeGenRegBank()
1204 CodeGenRegisterClass &RC = RegClasses.back(); in CodeGenRegBank() local
1205 if (!RC.Artificial) in CodeGenRegBank()
1206 addToMaps(&RC); in CodeGenRegBank()
1215 for (auto &RC : RegClasses) in CodeGenRegBank() local
1216 RC.EnumValue = i++; in CodeGenRegBank()
1250 void CodeGenRegBank::addToMaps(CodeGenRegisterClass *RC) { in addToMaps() argument
1251 if (Record *Def = RC->getDef()) in addToMaps()
1252 Def2RC.insert(std::make_pair(Def, RC)); in addToMaps()
1256 CodeGenRegisterClass::Key K(*RC); in addToMaps()
1257 Key2RC.insert(std::make_pair(K, RC)); in addToMaps()
1262 CodeGenRegBank::getOrCreateSubClass(const CodeGenRegisterClass *RC, in getOrCreateSubClass() argument
1266 CodeGenRegisterClass::Key K(Members, RC->RSI); in getOrCreateSubClass()
1278 if (CodeGenRegisterClass *RC = Def2RC.lookup(Def)) in getRegClass() local
1279 return RC; in getRegClass()
1893 for (auto &RC : RegClasses) { in computeRegUnitSets() local
1894 if (!RC.Allocatable || RC.Artificial || !RC.GeneratePressureSet) in computeRegUnitSets()
1899 RegUnitSets.back().Name = RC.getName(); in computeRegUnitSets()
1902 RC.buildRegUnitSet(*this, RegUnitSets.back().Units); in computeRegUnitSets()
1994 for (auto &RC : RegClasses) { in computeRegUnitSets() local
1996 if (!RC.Allocatable) in computeRegUnitSets()
2001 RC.buildRegUnitSet(*this, RCRegUnits); in computeRegUnitSets()
2007 LLVM_DEBUG(dbgs() << "RC " << RC.getName() << " Units:\n"; in computeRegUnitSets()
2106 for (CodeGenRegisterClass &RC : RegClasses) { in computeDerivedInfo()
2107 RC.HasDisjunctSubRegs = false; in computeDerivedInfo()
2108 RC.CoveredBySubRegs = true; in computeDerivedInfo()
2109 for (const CodeGenRegister *Reg : RC.getMembers()) { in computeDerivedInfo()
2110 RC.HasDisjunctSubRegs |= Reg->HasDisjunctSubRegs; in computeDerivedInfo()
2111 RC.CoveredBySubRegs &= Reg->CoveredBySubRegs; in computeDerivedInfo()
2139 void CodeGenRegBank::inferCommonSubClass(CodeGenRegisterClass *RC) { in inferCommonSubClass() argument
2145 CodeGenRegisterClass *RC1 = RC; in inferCommonSubClass()
2179 void CodeGenRegBank::inferSubClassWithSubReg(CodeGenRegisterClass *RC) { in inferSubClassWithSubReg() argument
2187 for (const auto R : RC->getMembers()) { in inferSubClassWithSubReg()
2210 if (I->second.size() == RC->getMembers().size()) { in inferSubClassWithSubReg()
2211 RC->setSubClassWithSubReg(&SubIdx, RC); in inferSubClassWithSubReg()
2216 getOrCreateSubClass(RC, &I->second, in inferSubClassWithSubReg()
2217 RC->getName() + "_with_" + I->first->getName()); in inferSubClassWithSubReg()
2218 RC->setSubClassWithSubReg(&SubIdx, SubRC); in inferSubClassWithSubReg()
2229 void CodeGenRegBank::inferMatchingSuperRegClass(CodeGenRegisterClass *RC, in inferMatchingSuperRegClass() argument
2240 if (RC->getSubClassWithSubReg(&SubIdx) != RC) in inferMatchingSuperRegClass()
2246 for (const auto Super : RC->getMembers()) { in inferMatchingSuperRegClass()
2278 SubRC.addSuperRegClass(&SubIdx, RC); in inferMatchingSuperRegClass()
2284 getOrCreateSubClass(RC, &SubSetVec, RC->getName() + "_with_" + in inferMatchingSuperRegClass()
2307 CodeGenRegisterClass *RC = &*I; in computeInferredRegisterClasses() local
2308 if (RC->Artificial) in computeInferredRegisterClasses()
2312 inferSubClassWithSubReg(RC); in computeInferredRegisterClasses()
2315 inferCommonSubClass(RC); in computeInferredRegisterClasses()
2318 inferMatchingSuperRegClass(RC); in computeInferredRegisterClasses()
2345 for (const auto &RC : getRegClasses()) { in getRegClassForRegister() local
2346 if (!RC.contains(Reg)) in getRegClassForRegister()
2352 FoundRC = &RC; in getRegClassForRegister()
2357 if (RC.getValueTypes() != FoundRC->getValueTypes()) in getRegClassForRegister()
2363 if (RC.hasSubClass(FoundRC)) { in getRegClassForRegister()
2364 FoundRC = &RC; in getRegClassForRegister()
2371 if (FoundRC->hasSubClass(&RC)) in getRegClassForRegister()
2386 for (const auto &RC : getRegClasses()) { in getMinimalPhysRegClass() local
2387 if ((!VT || RC.hasType(*VT)) && in getMinimalPhysRegClass()
2388 RC.contains(Reg) && (!BestRC || BestRC->hasSubClass(&RC))) in getMinimalPhysRegClass()
2389 BestRC = &RC; in getMinimalPhysRegClass()