Lines Matching refs:ImplicitOp

1191                                   bool &isKill, MachineOperand &ImplicitOp,  in classifyLEAReg()  argument
1219 ImplicitOp = Src; in classifyLEAReg()
1220 ImplicitOp.setImplicit(); in classifyLEAReg()
1436 MachineOperand ImplicitOp = MachineOperand::CreateReg(0, false); in convertToThreeAddress() local
1438 SrcReg, isKill, ImplicitOp, LV)) in convertToThreeAddress()
1449 if (ImplicitOp.getReg() != 0) in convertToThreeAddress()
1450 MIB.add(ImplicitOp); in convertToThreeAddress()
1472 MachineOperand ImplicitOp = MachineOperand::CreateReg(0, false); in convertToThreeAddress() local
1474 ImplicitOp, LV)) in convertToThreeAddress()
1481 if (ImplicitOp.getReg() != 0) in convertToThreeAddress()
1482 MIB.add(ImplicitOp); in convertToThreeAddress()
1495 MachineOperand ImplicitOp = MachineOperand::CreateReg(0, false); in convertToThreeAddress() local
1497 ImplicitOp, LV)) in convertToThreeAddress()
1503 if (ImplicitOp.getReg() != 0) in convertToThreeAddress()
1504 MIB.add(ImplicitOp); in convertToThreeAddress()
1530 MachineOperand ImplicitOp = MachineOperand::CreateReg(0, false); in convertToThreeAddress() local
1532 SrcReg, isKill, ImplicitOp, LV)) in convertToThreeAddress()
1544 if (ImplicitOp.getReg() != 0) in convertToThreeAddress()
1545 MIB.add(ImplicitOp); in convertToThreeAddress()
1579 MachineOperand ImplicitOp = MachineOperand::CreateReg(0, false); in convertToThreeAddress() local
1581 SrcReg, isKill, ImplicitOp, LV)) in convertToThreeAddress()
1587 if (ImplicitOp.getReg() != 0) in convertToThreeAddress()
1588 MIB.add(ImplicitOp); in convertToThreeAddress()
1620 MachineOperand ImplicitOp = MachineOperand::CreateReg(0, false); in convertToThreeAddress() local
1622 SrcReg, isKill, ImplicitOp, LV)) in convertToThreeAddress()
1628 if (ImplicitOp.getReg() != 0) in convertToThreeAddress()
1629 MIB.add(ImplicitOp); in convertToThreeAddress()