338   switch (VT.SimpleTy) {  in X86FastEmitLoad()
499   switch (VT.getSimpleVT().SimpleTy) {  in X86FastEmitStore()
671     switch (VT.getSimpleVT().SimpleTy) {  in X86FastEmitStore()
1364   switch (VT.getSimpleVT().SimpleTy) {  in X86ChooseCmpOpcode()
1387   switch (VT.getSimpleVT().SimpleTy) {  in X86ChooseCmpImmediateOpcode()
1566     switch (SrcVT.SimpleTy) {  in X86SelectZExt()
1734       switch (SourceVT.SimpleTy) {  in X86SelectBranch()
1933   switch (VT.SimpleTy) {  in X86SelectDivRem()
2261     switch (RetVT.SimpleTy) {  in X86FastEmitSSESelect()
2284   switch (RetVT.SimpleTy) {  in X86FastEmitPseudoSelect()
2677     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
2819     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
2916                 TII.get(Opc[IsDec][VT.SimpleTy-MVT::i8]), ResultReg)  in fastLowerIntrinsicCall()
2939               TII.get(TargetOpcode::COPY), Reg[VT.SimpleTy-MVT::i8])  in fastLowerIntrinsicCall()
2941       ResultReg = fastEmitInst_r(MULOpc[VT.SimpleTy-MVT::i8],  in fastLowerIntrinsicCall()
2954         ResultReg = fastEmitInst_rr(MULOpc[VT.SimpleTy-MVT::i8],  in fastLowerIntrinsicCall()
3008     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
3083     switch (ArgVT.getSimpleVT().SimpleTy) {  in fastLowerArguments()
3121     switch (VT.SimpleTy) {  in fastLowerArguments()
3680     switch (VT.SimpleTy) {  in X86MaterializeInt()
3700   switch (VT.SimpleTy) {  in X86MaterializeInt()
3734   switch (VT.SimpleTy) {  in X86MaterializeFP()
3772   Register ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy));  in X86MaterializeFP()
3847     switch (VT.SimpleTy) {  in fastMaterializeConstant()
3908   switch (VT.SimpleTy) {  in fastMaterializeFloatZero()