Lines Matching refs:vec
152 foreach vec = AllVecs in {
153 defm : LoadPatNoOffset<vec.vt, load, "LOAD_V128">;
154 defm : LoadPatImmOff<vec.vt, load, regPlusImm, "LOAD_V128">;
155 defm : LoadPatImmOff<vec.vt, load, or_is_add, "LOAD_V128">;
156 defm : LoadPatOffsetOnly<vec.vt, load, "LOAD_V128">;
157 defm : LoadPatGlobalAddrOffOnly<vec.vt, load, "LOAD_V128">;
190 foreach vec = AllVecs in {
191 defvar inst = "LOAD"#vec.lane_bits#"_SPLAT";
192 defm : LoadPatNoOffset<vec.vt, load_splat, inst>;
193 defm : LoadPatImmOff<vec.vt, load_splat, regPlusImm, inst>;
194 defm : LoadPatImmOff<vec.vt, load_splat, or_is_add, inst>;
195 defm : LoadPatOffsetOnly<vec.vt, load_splat, inst>;
196 defm : LoadPatGlobalAddrOffOnly<vec.vt, load_splat, inst>;
200 multiclass SIMDLoadExtend<Vec vec, string loadPat, bits<32> simdop> {
201 defvar signed = vec.prefix#".load"#loadPat#"_s";
202 defvar unsigned = vec.prefix#".load"#loadPat#"_u";
204 defm LOAD_EXTEND_S_#vec#_A32 :
210 defm LOAD_EXTEND_U_#vec#_A32 :
216 defm LOAD_EXTEND_S_#vec#_A64 :
222 defm LOAD_EXTEND_U_#vec#_A64 :
235 foreach vec = [I16x8, I32x4, I64x2] in
239 defvar loadpat = !cast<PatFrag>(exts[0]#vec.split.lane_bits);
240 defvar inst = "LOAD_EXTEND"#exts[1]#"_"#vec;
241 defm : LoadPatNoOffset<vec.vt, loadpat, inst>;
242 defm : LoadPatImmOff<vec.vt, loadpat, regPlusImm, inst>;
243 defm : LoadPatImmOff<vec.vt, loadpat, or_is_add, inst>;
244 defm : LoadPatOffsetOnly<vec.vt, loadpat, inst>;
245 defm : LoadPatGlobalAddrOffOnly<vec.vt, loadpat, inst>;
249 multiclass SIMDLoadZero<Vec vec, bits<32> simdop> {
250 defvar name = "v128.load"#vec.lane_bits#"_zero";
252 defm LOAD_ZERO_#vec#_A32 :
258 defm LOAD_ZERO_#vec#_A64 :
271 foreach vec = [I32x4, I64x2] in {
272 defvar inst = "LOAD_ZERO_"#vec;
274 (vector_insert (vec.splat (vec.lane_vt 0)), (vec.lane_vt (load $ptr)), 0)>;
275 defm : LoadPatNoOffset<vec.vt, pat, inst>;
276 defm : LoadPatImmOff<vec.vt, pat, regPlusImm, inst>;
277 defm : LoadPatImmOff<vec.vt, pat, or_is_add, inst>;
278 defm : LoadPatOffsetOnly<vec.vt, pat, inst>;
279 defm : LoadPatGlobalAddrOffOnly<vec.vt, pat, inst>;
283 multiclass SIMDLoadLane<Vec vec, bits<32> simdop> {
284 defvar name = "v128.load"#vec.lane_bits#"_lane";
286 defm LOAD_LANE_#vec#_A32 :
289 I32:$addr, V128:$vec),
291 [], name#"\t$dst, ${off}(${addr})$p2align, $vec, $idx",
293 defm LOAD_LANE_#vec#_A64 :
296 I64:$addr, V128:$vec),
298 [], name#"\t$dst, ${off}(${addr})$p2align, $vec, $idx",
309 multiclass LoadLanePatNoOffset<Vec vec, SDPatternOperator kind> {
310 defvar load_lane_a32 = !cast<NI>("LOAD_LANE_"#vec#"_A32");
311 defvar load_lane_a64 = !cast<NI>("LOAD_LANE_"#vec#"_A64");
312 def : Pat<(vec.vt (kind (i32 I32:$addr),
313 (vec.vt V128:$vec), (i32 vec.lane_idx:$idx))),
314 (load_lane_a32 0, 0, imm:$idx, $addr, $vec)>,
316 def : Pat<(vec.vt (kind (i64 I64:$addr),
317 (vec.vt V128:$vec), (i32 vec.lane_idx:$idx))),
318 (load_lane_a64 0, 0, imm:$idx, $addr, $vec)>,
323 PatFrag<(ops node:$ptr, node:$vec, node:$idx),
324 (vector_insert $vec, (i32 (extloadi8 $ptr)), $idx)>;
326 PatFrag<(ops node:$ptr, node:$vec, node:$idx),
327 (vector_insert $vec, (i32 (extloadi16 $ptr)), $idx)>;
329 PatFrag<(ops node:$ptr, node:$vec, node:$idx),
330 (vector_insert $vec, (i32 (load $ptr)), $idx)>;
332 PatFrag<(ops node:$ptr, node:$vec, node:$idx),
333 (vector_insert $vec, (i64 (load $ptr)), $idx)>;
347 SIMD_I<(outs), (ins P2Align:$p2align, offset32_op:$off, I32:$addr, V128:$vec),
349 "v128.store\t${off}(${addr})$p2align, $vec",
352 SIMD_I<(outs), (ins P2Align:$p2align, offset64_op:$off, I64:$addr, V128:$vec),
354 "v128.store\t${off}(${addr})$p2align, $vec",
359 foreach vec = AllVecs in {
360 defm : StorePatNoOffset<vec.vt, store, "STORE_V128">;
361 defm : StorePatImmOff<vec.vt, store, regPlusImm, "STORE_V128">;
362 defm : StorePatImmOff<vec.vt, store, or_is_add, "STORE_V128">;
363 defm : StorePatOffsetOnly<vec.vt, store, "STORE_V128">;
364 defm : StorePatGlobalAddrOffOnly<vec.vt, store, "STORE_V128">;
368 multiclass SIMDStoreLane<Vec vec, bits<32> simdop> {
369 defvar name = "v128.store"#vec.lane_bits#"_lane";
371 defm STORE_LANE_#vec#_A32 :
374 I32:$addr, V128:$vec),
376 [], name#"\t${off}(${addr})$p2align, $vec, $idx",
378 defm STORE_LANE_#vec#_A64 :
381 I64:$addr, V128:$vec),
383 [], name#"\t${off}(${addr})$p2align, $vec, $idx",
394 multiclass StoreLanePatNoOffset<Vec vec, SDPatternOperator kind> {
395 def : Pat<(kind (i32 I32:$addr), (vec.vt V128:$vec), (i32 vec.lane_idx:$idx)),
396 (!cast<NI>("STORE_LANE_"#vec#"_A32") 0, 0, imm:$idx, $addr, $vec)>,
398 def : Pat<(kind (i64 I64:$addr), (vec.vt V128:$vec), (i32 vec.lane_idx:$idx)),
399 (!cast<NI>("STORE_LANE_"#vec#"_A64") 0, 0, imm:$idx, $addr, $vec)>,
404 PatFrag<(ops node:$ptr, node:$vec, node:$idx),
405 (truncstorei8 (i32 (vector_extract $vec, $idx)), $ptr)>;
407 PatFrag<(ops node:$ptr, node:$vec, node:$idx),
408 (truncstorei16 (i32 (vector_extract $vec, $idx)), $ptr)>;
410 PatFrag<(ops node:$ptr, node:$vec, node:$idx),
411 (store (i32 (vector_extract $vec, $idx)), $ptr)>;
413 PatFrag<(ops node:$ptr, node:$vec, node:$idx),
414 (store (i64 (vector_extract $vec, $idx)), $ptr)>;
429 multiclass ConstVec<Vec vec, dag ops, dag pat, string args> {
431 defm CONST_V128_#vec : SIMD_I<(outs V128:$dst), ops, (outs), ops,
432 [(set V128:$dst, (vec.vt pat))],
517 foreach vec = AllVecs in {
518 def : Pat<(vec.vt (wasm_shuffle (vec.vt V128:$x), (vec.vt V128:$y),
546 multiclass Splat<Vec vec, bits<32> simdop> {
547 defm SPLAT_#vec : SIMD_I<(outs V128:$dst), (ins vec.lane_rc:$x),
549 [(set (vec.vt V128:$dst),
550 (vec.splat vec.lane_rc:$x))],
551 vec.prefix#".splat\t$dst, $x", vec.prefix#".splat",
563 foreach vec = AllVecs in
564 def : Pat<(vec.vt (scalar_to_vector (vec.lane_vt vec.lane_rc:$x))),
565 (!cast<Instruction>("SPLAT_"#vec) $x)>;
572 multiclass ExtractLane<Vec vec, bits<32> simdop, string suffix = ""> {
573 defm EXTRACT_LANE_#vec#suffix :
574 SIMD_I<(outs vec.lane_rc:$dst), (ins V128:$vec, vec_i8imm_op:$idx),
576 vec.prefix#".extract_lane"#suffix#"\t$dst, $vec, $idx",
577 vec.prefix#".extract_lane"#suffix#"\t$idx", simdop>;
589 def : Pat<(vector_extract (v16i8 V128:$vec), (i32 LaneIdx16:$idx)),
590 (EXTRACT_LANE_I8x16_u $vec, imm:$idx)>;
591 def : Pat<(vector_extract (v8i16 V128:$vec), (i32 LaneIdx8:$idx)),
592 (EXTRACT_LANE_I16x8_u $vec, imm:$idx)>;
593 def : Pat<(vector_extract (v4i32 V128:$vec), (i32 LaneIdx4:$idx)),
594 (EXTRACT_LANE_I32x4 $vec, imm:$idx)>;
595 def : Pat<(vector_extract (v4f32 V128:$vec), (i32 LaneIdx4:$idx)),
596 (EXTRACT_LANE_F32x4 $vec, imm:$idx)>;
597 def : Pat<(vector_extract (v2i64 V128:$vec), (i32 LaneIdx2:$idx)),
598 (EXTRACT_LANE_I64x2 $vec, imm:$idx)>;
599 def : Pat<(vector_extract (v2f64 V128:$vec), (i32 LaneIdx2:$idx)),
600 (EXTRACT_LANE_F64x2 $vec, imm:$idx)>;
603 (sext_inreg (vector_extract (v16i8 V128:$vec), (i32 LaneIdx16:$idx)), i8),
604 (EXTRACT_LANE_I8x16_s $vec, imm:$idx)>;
606 (and (vector_extract (v16i8 V128:$vec), (i32 LaneIdx16:$idx)), (i32 0xff)),
607 (EXTRACT_LANE_I8x16_u $vec, imm:$idx)>;
609 (sext_inreg (vector_extract (v8i16 V128:$vec), (i32 LaneIdx8:$idx)), i16),
610 (EXTRACT_LANE_I16x8_s $vec, imm:$idx)>;
612 (and (vector_extract (v8i16 V128:$vec), (i32 LaneIdx8:$idx)), (i32 0xffff)),
613 (EXTRACT_LANE_I16x8_u $vec, imm:$idx)>;
616 multiclass ReplaceLane<Vec vec, bits<32> simdop> {
617 defm REPLACE_LANE_#vec :
618 SIMD_I<(outs V128:$dst), (ins V128:$vec, vec_i8imm_op:$idx, vec.lane_rc:$x),
621 (vec.vt V128:$vec),
622 (vec.lane_vt vec.lane_rc:$x),
623 (i32 vec.lane_idx:$idx)))],
624 vec.prefix#".replace_lane\t$dst, $vec, $idx, $x",
625 vec.prefix#".replace_lane\t$idx", simdop>;
636 def : Pat<(vector_insert (v16i8 V128:$vec), I32:$x, undef),
637 (REPLACE_LANE_I8x16 $vec, 0, $x)>;
638 def : Pat<(vector_insert (v8i16 V128:$vec), I32:$x, undef),
639 (REPLACE_LANE_I16x8 $vec, 0, $x)>;
640 def : Pat<(vector_insert (v4i32 V128:$vec), I32:$x, undef),
641 (REPLACE_LANE_I32x4 $vec, 0, $x)>;
642 def : Pat<(vector_insert (v2i64 V128:$vec), I64:$x, undef),
643 (REPLACE_LANE_I64x2 $vec, 0, $x)>;
644 def : Pat<(vector_insert (v4f32 V128:$vec), F32:$x, undef),
645 (REPLACE_LANE_F32x4 $vec, 0, $x)>;
646 def : Pat<(vector_insert (v2f64 V128:$vec), F64:$x, undef),
647 (REPLACE_LANE_F64x2 $vec, 0, $x)>;
653 multiclass SIMDCondition<Vec vec, string name, CondCode cond, bits<32> simdop> {
654 defm _#vec :
656 [(set (vec.int_vt V128:$dst),
657 (setcc (vec.vt V128:$lhs), (vec.vt V128:$rhs), cond))],
658 vec.prefix#"."#name#"\t$dst, $lhs, $rhs",
659 vec.prefix#"."#name, simdop>;
728 multiclass SIMDBinary<Vec vec, SDPatternOperator node, string name, bits<32> simdop> {
729 defm _#vec : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
731 [(set (vec.vt V128:$dst),
732 (node (vec.vt V128:$lhs), (vec.vt V128:$rhs)))],
733 vec.prefix#"."#name#"\t$dst, $lhs, $rhs",
734 vec.prefix#"."#name, simdop>;
743 foreach vec = IntVecs in
744 def : Pat<(node (vec.vt V128:$lhs), (vec.vt V128:$rhs)),
748 multiclass SIMDUnary<Vec vec, SDPatternOperator node, string name, bits<32> simdop> {
749 defm _#vec : SIMD_I<(outs V128:$dst), (ins V128:$v), (outs), (ins),
750 [(set (vec.vt V128:$dst),
751 (vec.vt (node (vec.vt V128:$v))))],
752 vec.prefix#"."#name#"\t$dst, $v",
753 vec.prefix#"."#name, simdop>;
759 foreach vec = IntVecs in
760 def : Pat<(vnot (vec.vt V128:$v)), (NOT $v)>;
776 foreach vec = AllVecs in
777 def : Pat<(vec.vt (int_wasm_bitselect
778 (vec.vt V128:$v1), (vec.vt V128:$v2), (vec.vt V128:$c))),
782 foreach vec = IntVecs in
783 def : Pat<(vec.vt (or (and (vec.vt V128:$c), (vec.vt V128:$v1)),
784 (and (vnot V128:$c), (vec.vt V128:$v2)))),
788 foreach vec = AllVecs in
789 def : Pat<(vec.vt (vselect
790 (vec.int_vt V128:$c), (vec.vt V128:$v1), (vec.vt V128:$v2))),
798 foreach vec = AllVecs in {
799 def : Pat<(select I32:$cond, (vec.vt V128:$lhs), (vec.vt V128:$rhs)),
806 (i32 (setne I32:$cond, 0)), (vec.vt V128:$lhs), (vec.vt V128:$rhs)),
811 (i32 (seteq I32:$cond, 0)), (vec.vt V128:$lhs), (vec.vt V128:$rhs)),
813 } // foreach vec
839 defm ANYTRUE : SIMD_I<(outs I32:$dst), (ins V128:$vec), (outs), (ins), [],
840 "v128.any_true\t$dst, $vec", "v128.any_true", 0x53>;
842 foreach vec = IntVecs in
843 def : Pat<(int_wasm_anytrue (vec.vt V128:$vec)), (ANYTRUE V128:$vec)>;
846 multiclass SIMDAllTrue<Vec vec, bits<32> simdop> {
847 defm ALLTRUE_#vec : SIMD_I<(outs I32:$dst), (ins V128:$vec), (outs), (ins),
849 (i32 (int_wasm_alltrue (vec.vt V128:$vec))))],
850 vec.prefix#".all_true\t$dst, $vec",
851 vec.prefix#".all_true", simdop>;
872 defvar vec = !cast<Vec>(reduction[2]);
873 def : Pat<(i32 (and (i32 (intrinsic (vec.vt V128:$x))), (i32 1))), (inst $x)>;
874 def : Pat<(i32 (setne (i32 (intrinsic (vec.vt V128:$x))), (i32 0))), (inst $x)>;
875 def : Pat<(i32 (seteq (i32 (intrinsic (vec.vt V128:$x))), (i32 1))), (inst $x)>;
878 multiclass SIMDBitmask<Vec vec, bits<32> simdop> {
879 defm _#vec : SIMD_I<(outs I32:$dst), (ins V128:$vec), (outs), (ins),
881 (i32 (int_wasm_bitmask (vec.vt V128:$vec))))],
882 vec.prefix#".bitmask\t$dst, $vec", vec.prefix#".bitmask",
895 multiclass SIMDShift<Vec vec, SDNode node, string name, bits<32> simdop> {
896 defm _#vec : SIMD_I<(outs V128:$dst), (ins V128:$vec, I32:$x), (outs), (ins),
897 [(set (vec.vt V128:$dst), (node V128:$vec, I32:$x))],
898 vec.prefix#"."#name#"\t$dst, $vec, $x",
899 vec.prefix#"."#name, simdop>;
1013 foreach vec = [I8x16, I16x8] in {
1014 defvar inst = !cast<NI>("AVGR_U_"#vec);
1017 (add_nuw (vec.vt V128:$lhs), (vec.vt V128:$rhs)),
1018 (vec.splat (i32 1))),
1037 multiclass SIMDExtBinary<Vec vec, SDPatternOperator node, string name,
1039 defm _#vec : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
1041 [(set (vec.vt V128:$dst), (node
1042 (vec.split.vt V128:$lhs),(vec.split.vt V128:$rhs)))],
1043 vec.prefix#"."#name#"\t$dst, $lhs, $rhs",
1044 vec.prefix#"."#name, simdop>;
1153 foreach vec = [F32x4, F64x2] in {
1154 defvar pmin = !cast<NI>("PMIN_"#vec);
1155 defvar pmax = !cast<NI>("PMAX_"#vec);
1156 def : Pat<(vec.int_vt (vselect
1157 (setolt (vec.vt (bitconvert V128:$rhs)),
1158 (vec.vt (bitconvert V128:$lhs))),
1161 def : Pat<(vec.int_vt (vselect
1162 (setolt (vec.vt (bitconvert V128:$lhs)),
1163 (vec.vt (bitconvert V128:$rhs))),
1172 multiclass SIMDConvert<Vec vec, Vec arg, SDPatternOperator op, string name,
1174 defm op#_#vec :
1175 SIMD_I<(outs V128:$dst), (ins V128:$vec), (outs), (ins),
1176 [(set (vec.vt V128:$dst), (vec.vt (op (arg.vt V128:$vec))))],
1177 vec.prefix#"."#name#"\t$dst, $vec", vec.prefix#"."#name, simdop>;
1211 multiclass SIMDExtend<Vec vec, bits<32> baseInst> {
1212 defm "" : SIMDConvert<vec, vec.split, extend_low_s,
1213 "extend_low_"#vec.split.prefix#"_s", baseInst>;
1214 defm "" : SIMDConvert<vec, vec.split, extend_high_s,
1215 "extend_high_"#vec.split.prefix#"_s", !add(baseInst, 1)>;
1216 defm "" : SIMDConvert<vec, vec.split, extend_low_u,
1217 "extend_low_"#vec.split.prefix#"_u", !add(baseInst, 2)>;
1218 defm "" : SIMDConvert<vec, vec.split, extend_high_u,
1219 "extend_high_"#vec.split.prefix#"_u", !add(baseInst, 3)>;
1227 multiclass SIMDNarrow<Vec vec, bits<32> baseInst> {
1228 defvar name = vec.split.prefix#".narrow_"#vec.prefix;
1229 defm NARROW_S_#vec.split :
1231 [(set (vec.split.vt V128:$dst), (vec.split.vt (int_wasm_narrow_signed
1232 (vec.vt V128:$low), (vec.vt V128:$high))))],
1234 defm NARROW_U_#vec.split :
1236 [(set (vec.split.vt V128:$dst), (vec.split.vt (int_wasm_narrow_unsigned
1237 (vec.vt V128:$low), (vec.vt V128:$high))))],
1271 multiclass NarrowingStorePatNoOffset<Vec vec, OutPatFrag out> {
1272 defvar node = !cast<PatFrag>("truncstorevi"#vec.split.lane_bits);
1273 def : Pat<(node vec.vt:$val, I32:$addr),
1276 def : Pat<(node vec.vt:$val, I64:$addr),
1284 multiclass NarrowingStorePatImmOff<Vec vec, PatFrag operand, OutPatFrag out> {
1285 defvar node = !cast<PatFrag>("truncstorevi"#vec.split.lane_bits);
1286 def : Pat<(node vec.vt:$val, (operand I32:$addr, imm:$off)),
1289 def : Pat<(node vec.vt:$val, (operand I64:$addr, imm:$off)),
1299 multiclass NarrowingStorePatOffsetOnly<Vec vec, OutPatFrag out> {
1300 defvar node = !cast<PatFrag>("truncstorevi"#vec.split.lane_bits);
1301 def : Pat<(node vec.vt:$val, imm:$off),
1304 def : Pat<(node vec.vt:$val, imm:$off),
1312 multiclass NarrowingStorePatGlobalAddrOffOnly<Vec vec, OutPatFrag out> {
1313 defvar node = !cast<PatFrag>("truncstorevi"#vec.split.lane_bits);
1314 def : Pat<(node vec.vt:$val, (WebAssemblywrapper tglobaladdr:$off)),
1317 def : Pat<(node vec.vt:$val, (WebAssemblywrapper tglobaladdr:$off)),