Lines Matching refs:p2align

140   SIMD_I<(outs V128:$dst), (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
141 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
142 "v128.load\t$dst, ${off}(${addr})$p2align",
143 "v128.load\t$off$p2align", 0>;
145 SIMD_I<(outs V128:$dst), (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
146 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
147 "v128.load\t$dst, ${off}(${addr})$p2align",
148 "v128.load\t$off$p2align", 0>;
165 (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
167 (ins P2Align:$p2align, offset32_op:$off), [],
168 "v128.load"#size#"_splat\t$dst, ${off}(${addr})$p2align",
169 "v128.load"#size#"_splat\t$off$p2align", simdop>;
172 (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
174 (ins P2Align:$p2align, offset64_op:$off), [],
175 "v128.load"#size#"_splat\t$dst, ${off}(${addr})$p2align",
176 "v128.load"#size#"_splat\t$off$p2align", simdop>;
206 (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
207 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
208 signed#"\t$dst, ${off}(${addr})$p2align",
209 signed#"\t$off$p2align", simdop>;
212 (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
213 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
214 unsigned#"\t$dst, ${off}(${addr})$p2align",
215 unsigned#"\t$off$p2align", !add(simdop, 1)>;
218 (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
219 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
220 signed#"\t$dst, ${off}(${addr})$p2align",
221 signed#"\t$off$p2align", simdop>;
224 (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
225 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
226 unsigned#"\t$dst, ${off}(${addr})$p2align",
227 unsigned#"\t$off$p2align", !add(simdop, 1)>;
254 (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
255 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
256 name#"\t$dst, ${off}(${addr})$p2align",
257 name#"\t$off$p2align", simdop>;
260 (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
261 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
262 name#"\t$dst, ${off}(${addr})$p2align",
263 name#"\t$off$p2align", simdop>;
288 (ins P2Align:$p2align, offset32_op:$off, vec_i8imm_op:$idx,
290 (outs), (ins P2Align:$p2align, offset32_op:$off, vec_i8imm_op:$idx),
291 [], name#"\t$dst, ${off}(${addr})$p2align, $vec, $idx",
292 name#"\t$off$p2align, $idx", simdop>;
295 (ins P2Align:$p2align, offset64_op:$off, vec_i8imm_op:$idx,
297 (outs), (ins P2Align:$p2align, offset64_op:$off, vec_i8imm_op:$idx),
298 [], name#"\t$dst, ${off}(${addr})$p2align, $vec, $idx",
299 name#"\t$off$p2align, $idx", simdop>;
347 SIMD_I<(outs), (ins P2Align:$p2align, offset32_op:$off, I32:$addr, V128:$vec),
348 (outs), (ins P2Align:$p2align, offset32_op:$off), [],
349 "v128.store\t${off}(${addr})$p2align, $vec",
350 "v128.store\t$off$p2align", 11>;
352 SIMD_I<(outs), (ins P2Align:$p2align, offset64_op:$off, I64:$addr, V128:$vec),
353 (outs), (ins P2Align:$p2align, offset64_op:$off), [],
354 "v128.store\t${off}(${addr})$p2align, $vec",
355 "v128.store\t$off$p2align", 11>;
373 (ins P2Align:$p2align, offset32_op:$off, vec_i8imm_op:$idx,
375 (outs), (ins P2Align:$p2align, offset32_op:$off, vec_i8imm_op:$idx),
376 [], name#"\t${off}(${addr})$p2align, $vec, $idx",
377 name#"\t$off$p2align, $idx", simdop>;
380 (ins P2Align:$p2align, offset64_op:$off, vec_i8imm_op:$idx,
382 (outs), (ins P2Align:$p2align, offset64_op:$off, vec_i8imm_op:$idx),
383 [], name#"\t${off}(${addr})$p2align, $vec, $idx",
384 name#"\t$off$p2align, $idx", simdop>;