Lines Matching refs:MVT
46 auto MVTPtr = Subtarget->hasAddr64() ? MVT::i64 : MVT::i32; in WebAssemblyTargetLowering()
58 addRegisterClass(MVT::i32, &WebAssembly::I32RegClass); in WebAssemblyTargetLowering()
59 addRegisterClass(MVT::i64, &WebAssembly::I64RegClass); in WebAssemblyTargetLowering()
60 addRegisterClass(MVT::f32, &WebAssembly::F32RegClass); in WebAssemblyTargetLowering()
61 addRegisterClass(MVT::f64, &WebAssembly::F64RegClass); in WebAssemblyTargetLowering()
63 addRegisterClass(MVT::v16i8, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
64 addRegisterClass(MVT::v8i16, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
65 addRegisterClass(MVT::v4i32, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
66 addRegisterClass(MVT::v4f32, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
67 addRegisterClass(MVT::v2i64, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
68 addRegisterClass(MVT::v2f64, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
71 addRegisterClass(MVT::externref, &WebAssembly::EXTERNREFRegClass); in WebAssemblyTargetLowering()
72 addRegisterClass(MVT::funcref, &WebAssembly::FUNCREFRegClass); in WebAssemblyTargetLowering()
79 for (auto T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64}) { in WebAssemblyTargetLowering()
84 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::v2i64, in WebAssemblyTargetLowering()
85 MVT::v2f64}) { in WebAssemblyTargetLowering()
91 for (auto T : {MVT::externref, MVT::funcref}) { in WebAssemblyTargetLowering()
102 setOperationAction(ISD::BRIND, MVT::Other, Custom); in WebAssemblyTargetLowering()
106 setOperationAction(ISD::VASTART, MVT::Other, Custom); in WebAssemblyTargetLowering()
107 setOperationAction(ISD::VAARG, MVT::Other, Expand); in WebAssemblyTargetLowering()
108 setOperationAction(ISD::VACOPY, MVT::Other, Expand); in WebAssemblyTargetLowering()
109 setOperationAction(ISD::VAEND, MVT::Other, Expand); in WebAssemblyTargetLowering()
111 for (auto T : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64}) { in WebAssemblyTargetLowering()
133 setLoadExtAction(ISD::EXTLOAD, T, MVT::f16, Expand); in WebAssemblyTargetLowering()
134 setTruncStoreAction(T, MVT::f16, Expand); in WebAssemblyTargetLowering()
142 for (auto T : {MVT::i32, MVT::i64}) in WebAssemblyTargetLowering()
145 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64}) in WebAssemblyTargetLowering()
151 for (auto T : {MVT::i32, MVT::i64}) in WebAssemblyTargetLowering()
179 for (auto T : {MVT::v16i8, MVT::v8i16}) in WebAssemblyTargetLowering()
183 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64}) in WebAssemblyTargetLowering()
187 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::v2i64, in WebAssemblyTargetLowering()
188 MVT::v2f64}) in WebAssemblyTargetLowering()
192 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::v2i64, in WebAssemblyTargetLowering()
193 MVT::v2f64}) in WebAssemblyTargetLowering()
198 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64}) in WebAssemblyTargetLowering()
203 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::v2i64, in WebAssemblyTargetLowering()
204 MVT::v2f64}) in WebAssemblyTargetLowering()
208 setOperationAction(ISD::MUL, MVT::v16i8, Expand); in WebAssemblyTargetLowering()
211 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::v2i64, in WebAssemblyTargetLowering()
212 MVT::v2f64}) in WebAssemblyTargetLowering()
218 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64}) in WebAssemblyTargetLowering()
223 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32}) in WebAssemblyTargetLowering()
227 setOperationAction(ISD::CTPOP, MVT::v16i8, Legal); in WebAssemblyTargetLowering()
232 for (auto T : {MVT::v4f32, MVT::v2f64}) in WebAssemblyTargetLowering()
237 setCondCodeAction(CC, MVT::v2i64, Custom); in WebAssemblyTargetLowering()
242 for (auto T : {MVT::v2i64, MVT::v2f64}) in WebAssemblyTargetLowering()
247 setOperationAction(Op, MVT::v4i32, Custom); in WebAssemblyTargetLowering()
252 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); in WebAssemblyTargetLowering()
256 for (auto T : {MVT::i8, MVT::i16, MVT::i32}) in WebAssemblyTargetLowering()
259 for (auto T : MVT::integer_fixedlen_vector_valuetypes()) in WebAssemblyTargetLowering()
263 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); in WebAssemblyTargetLowering()
264 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); in WebAssemblyTargetLowering()
267 setOperationAction(ISD::FrameIndex, MVT::i32, Custom); in WebAssemblyTargetLowering()
268 setOperationAction(ISD::FrameIndex, MVT::i64, Custom); in WebAssemblyTargetLowering()
269 setOperationAction(ISD::CopyToReg, MVT::Other, Custom); in WebAssemblyTargetLowering()
272 for (auto T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64}) in WebAssemblyTargetLowering()
277 setOperationAction(ISD::BR_JT, MVT::Other, Custom); in WebAssemblyTargetLowering()
284 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); in WebAssemblyTargetLowering()
285 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in WebAssemblyTargetLowering()
286 for (auto T : MVT::integer_valuetypes()) in WebAssemblyTargetLowering()
288 setLoadExtAction(Ext, T, MVT::i1, Promote); in WebAssemblyTargetLowering()
290 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, in WebAssemblyTargetLowering()
291 MVT::v2f64}) { in WebAssemblyTargetLowering()
292 for (auto MemT : MVT::fixedlen_vector_valuetypes()) { in WebAssemblyTargetLowering()
293 if (MVT(T) != MemT) { in WebAssemblyTargetLowering()
302 setLoadExtAction(Ext, MVT::v8i16, MVT::v8i8, Legal); in WebAssemblyTargetLowering()
303 setLoadExtAction(Ext, MVT::v4i32, MVT::v4i16, Legal); in WebAssemblyTargetLowering()
304 setLoadExtAction(Ext, MVT::v2i64, MVT::v2i32, Legal); in WebAssemblyTargetLowering()
307 setTruncStoreAction(MVT::v8i16, MVT::v8i8, Legal); in WebAssemblyTargetLowering()
308 setTruncStoreAction(MVT::v4i32, MVT::v4i16, Legal); in WebAssemblyTargetLowering()
312 setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand); in WebAssemblyTargetLowering()
315 setOperationAction(ISD::TRAP, MVT::Other, Legal); in WebAssemblyTargetLowering()
316 setOperationAction(ISD::DEBUGTRAP, MVT::Other, Legal); in WebAssemblyTargetLowering()
319 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in WebAssemblyTargetLowering()
320 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom); in WebAssemblyTargetLowering()
321 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in WebAssemblyTargetLowering()
383 MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout & /*DL*/, in getScalarShiftAmountTy()
397 MVT Result = MVT::getIntegerVT(BitWidth); in getScalarShiftAmountTy()
398 assert(Result != MVT::INVALID_SIMPLE_VALUE_TYPE && in getScalarShiftAmountTy()
680 const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const { in getRegForInlineAsmConstraint()
686 assert(VT != MVT::iPTR && "Pointer MVT not expected here"); in getRegForInlineAsmConstraint()
768 return (ExtT == MVT::v8i16 && MemT == MVT::v8i8) || in isVectorLoadExtDesirable()
769 (ExtT == MVT::v4i32 && MemT == MVT::v4i16) || in isVectorLoadExtDesirable()
770 (ExtT == MVT::v2i64 && MemT == MVT::v2i32); in isVectorLoadExtDesirable()
793 Info.memVT = MVT::i32; in getTgtMemIntrinsic()
807 Info.memVT = MVT::i32; in getTgtMemIntrinsic()
815 Info.memVT = MVT::i64; in getTgtMemIntrinsic()
891 SmallVector<MVT, 4> CallerRetTys; in LowerCall()
892 SmallVector<MVT, 4> CalleeRetTys; in LowerCall()
959 DAG.getConstant(Out.Flags.getByValSize(), DL, MVT::i32); in LowerCall()
1008 assert(VT != MVT::iPTR && "Legalized args should be concrete"); in LowerCall()
1043 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in LowerCall()
1103 SDValue TableSlot = DAG.getConstant(0, DL, MVT::i32); in LowerCall()
1106 WebAssemblyISD::TABLE_SET, DL, DAG.getVTList(MVT::Other), TableSetOps, in LowerCall()
1107 MVT::funcref, in LowerCall()
1118 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); in LowerCall()
1122 InTys.push_back(MVT::Other); in LowerCall()
1153 Chain = DAG.getNode(WebAssemblyISD::RETURN, DL, MVT::Other, RetOps); in LowerReturn()
1202 DL, MVT::i32)) in LowerFormalArguments()
1225 MVT PtrVT = getPointerTy(MF.getDataLayout()); in LowerFormalArguments()
1232 DAG.getTargetConstant(Ins.size(), DL, MVT::i32))); in LowerFormalArguments()
1237 SmallVector<MVT, 4> Params; in LowerFormalArguments()
1238 SmallVector<MVT, 4> Results; in LowerFormalArguments()
1241 for (MVT VT : Results) in LowerFormalArguments()
1370 SDVTList Tys = DAG.getVTList(MVT::Other); in LowerStore()
1381 SDValue Idx = DAG.getTargetConstant(*Local, Base, MVT::i32); in LowerStore()
1382 SDVTList Tys = DAG.getVTList(MVT::Other); // The chain. in LowerStore()
1402 SDVTList Tys = DAG.getVTList(LN->getValueType(0), MVT::Other); in LowerLoad()
1413 SDValue Idx = DAG.getTargetConstant(*Local, Base, MVT::i32); in LowerLoad()
1438 SDValue Copy(DAG.getMachineNode(VT == MVT::i32 ? WebAssembly::COPY_I32 in LowerCopyToReg()
1474 {DAG.getConstant(Depth, DL, MVT::i32)}, CallOptions, DL) in LowerRETURNADDR()
1498 MVT PtrVT = getPointerTy(DAG.getDataLayout()); in LowerGlobalTLSAddress()
1520 auto GlobalGet = PtrVT == MVT::i64 ? WebAssembly::GLOBAL_GET_I64 in LowerGlobalTLSAddress()
1551 MVT PtrVT = getPointerTy(MF.getDataLayout()); in LowerGlobalAddress()
1626 return DAG.getNode(WebAssemblyISD::BR_TABLE, DL, MVT::Other, Ops); in LowerBR_JT()
1652 MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout()); in getCppExceptionSymNode()
1682 MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout()); in LowerIntrinsic()
1693 MVT::Other, // outchain type in LowerIntrinsic()
1705 MVT::i32, // outchain type in LowerIntrinsic()
1706 MVT::Other // return value in LowerIntrinsic()
1724 Ops[OpIdx++] = DAG.getConstant(0, DL, MVT::i32); in LowerIntrinsic()
1750 MVT VecT = Extract.getOperand(0).getSimpleValueType(); in LowerSIGN_EXTEND_INREG()
1753 MVT ExtractedLaneT = in LowerSIGN_EXTEND_INREG()
1755 MVT ExtractedVecT = in LowerSIGN_EXTEND_INREG()
1756 MVT::getVectorVT(ExtractedLaneT, 128 / ExtractedLaneT.getSizeInBits()); in LowerSIGN_EXTEND_INREG()
1783 bool CanSwizzle = VecT == MVT::v16i8; in LowerBUILD_VECTOR()
1816 if (SwizzleSrc.getValueType() != MVT::v16i8 || in LowerBUILD_VECTOR()
1817 SwizzleIndices.getValueType() != MVT::v16i8 || in LowerBUILD_VECTOR()
2014 DAG.getConstant(I, DL, MVT::i32)); in LowerBUILD_VECTOR()
2025 MVT VecType = Op.getOperand(0).getSimpleValueType(); in LowerVECTOR_SHUFFLE()
2040 Ops[OpIdx++] = DAG.getConstant(ByteIndex, DL, MVT::i32); in LowerVECTOR_SHUFFLE()
2052 assert(Op->getOperand(0)->getSimpleValueType(0) == MVT::v2i64); in LowerSETCC()
2058 return DAG.getNode(ISD::SELECT_CC, DL, MVT::i64, LHS[I], RHS[I], in LowerSETCC()
2059 DAG.getConstant(uint64_t(-1), DL, MVT::i64), in LowerSETCC()
2060 DAG.getConstant(uint64_t(0), DL, MVT::i64), CC); in LowerSETCC()
2081 if (LaneT.bitsGE(MVT::i32)) in unrollVectorShift()
2086 SDValue Mask = DAG.getConstant(LaneT.getSizeInBits() - 1, DL, MVT::i32); in unrollVectorShift()
2089 DAG.ExtractVectorElements(Op.getOperand(0), ShiftedElements, 0, 0, MVT::i32); in unrollVectorShift()
2091 DAG.ExtractVectorElements(Op.getOperand(1), ShiftElements, 0, 0, MVT::i32); in unrollVectorShift()
2095 DAG.getNode(ISD::AND, DL, MVT::i32, ShiftElements[i], Mask); in unrollVectorShift()
2098 ShiftedValue = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, MVT::i32, in unrollVectorShift()
2101 DAG.getNode(ShiftOpcode, DL, MVT::i32, ShiftedValue, MaskedShiftValue)); in unrollVectorShift()
2118 ShiftVal = DAG.getAnyExtOrTrunc(ShiftVal, DL, MVT::i32); in LowerShift()
2144 if ((ResT == MVT::i32 || ResT == MVT::i64) && in LowerFP_TO_INT_SAT()
2145 (SatVT == MVT::i32 || SatVT == MVT::i64)) in LowerFP_TO_INT_SAT()
2148 if (ResT == MVT::v4i32 && SatVT == MVT::i32) in LowerFP_TO_INT_SAT()
2172 MVT SrcType = CastOp.getSimpleValueType(); in performVECTOR_SHUFFLECombine()
2173 MVT DstType = Bitcast.getSimpleValueType(); in performVECTOR_SHUFFLECombine()
2202 if (ResVT == MVT::v8i16) { in performVectorExtendCombine()
2203 if (Extract.getValueType() != MVT::v8i8 || in performVectorExtendCombine()
2204 Source.getValueType() != MVT::v16i8 || (Index != 0 && Index != 8)) in performVectorExtendCombine()
2206 } else if (ResVT == MVT::v4i32) { in performVectorExtendCombine()
2207 if (Extract.getValueType() != MVT::v4i16 || in performVectorExtendCombine()
2208 Source.getValueType() != MVT::v8i16 || (Index != 0 && Index != 4)) in performVectorExtendCombine()
2210 } else if (ResVT == MVT::v2i64) { in performVectorExtendCombine()
2211 if (Extract.getValueType() != MVT::v2i32 || in performVectorExtendCombine()
2212 Source.getValueType() != MVT::v4i32 || (Index != 0 && Index != 2)) in performVectorExtendCombine()
2235 if (ResVT != MVT::v2f64) in performVectorConvertLowCombine()
2266 MVT ExpectedSourceType; in performVectorConvertLowCombine()
2270 ExpectedSourceType = MVT::v4i32; in performVectorConvertLowCombine()
2273 ExpectedSourceType = MVT::v4f32; in performVectorConvertLowCombine()
2279 if (Conversion.getValueType() != MVT::v4f64) in performVectorConvertLowCombine()
2308 MVT ExpectedExtractType; in performVectorConvertLowCombine()
2309 MVT ExpectedSourceType; in performVectorConvertLowCombine()
2313 ExpectedExtractType = MVT::v2i32; in performVectorConvertLowCombine()
2314 ExpectedSourceType = MVT::v4i32; in performVectorConvertLowCombine()
2317 ExpectedExtractType = MVT::v2f32; in performVectorConvertLowCombine()
2318 ExpectedSourceType = MVT::v4f32; in performVectorConvertLowCombine()
2389 ResVT = MVT::v4i32; in performVectorTruncZeroCombine()
2390 ExpectedConversionType = MVT::v2i32; in performVectorTruncZeroCombine()
2393 ResVT = MVT::v4f32; in performVectorTruncZeroCombine()
2394 ExpectedConversionType = MVT::v2f32; in performVectorTruncZeroCombine()
2407 if (Source.getValueType() != MVT::v2f64) in performVectorTruncZeroCombine()
2434 ResVT = MVT::v4i32; in performVectorTruncZeroCombine()
2437 ResVT = MVT::v4f32; in performVectorTruncZeroCombine()
2447 if (Concat.getValueType() != MVT::v4f64) in performVectorTruncZeroCombine()
2451 if (Source.getValueType() != MVT::v2f64) in performVectorTruncZeroCombine()
2455 Concat.getOperand(1).getValueType() != MVT::v2f64) in performVectorTruncZeroCombine()