Lines Matching refs:addOperand

133   Inst.addOperand(MCOperand::createReg(Reg));  in DecodeI32RegisterClass()
143 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeI64RegisterClass()
153 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeF32RegisterClass()
163 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeF128RegisterClass()
177 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeV64RegisterClass()
187 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeVMRegisterClass()
197 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeVM512RegisterClass()
209 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeMISCRegisterClass()
322 MI.addOperand(MCOperand::createImm(0)); in DecodeASX()
331 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeASX()
335 MI.addOperand(MCOperand::createImm(simm32)); in DecodeASX()
353 MI.addOperand(MCOperand::createImm(0)); in DecodeAS()
357 MI.addOperand(MCOperand::createImm(simm32)); in DecodeAS()
477 MI.addOperand(MCOperand::createImm(sy)); in DecodeCAS()
479 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeCAS()
522 MI.addOperand(MCOperand::createImm(tgt)); in DecodeSIMM7()
529 MI.addOperand(MCOperand::createImm(tgt)); in DecodeSIMM32()
572 MI.addOperand(MCOperand::createImm(VEValToCondCode(cf, isIntegerBCKind(MI)))); in DecodeCCOperand()
579 MI.addOperand(MCOperand::createImm(VEValToRD(cf))); in DecodeRDOperand()
592 MI.addOperand(MCOperand::createImm(VEValToCondCode(cf, isIntegerBCKind(MI)))); in DecodeBranchCondition()
601 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeBranchCondition()