Lines Matching refs:BitSize
2391 static unsigned getTestUnderMaskCond(unsigned BitSize, unsigned CCMask, in getTestUnderMaskCond() argument
2529 unsigned BitSize = NewC.Op0.getValueSizeInBits(); in adjustForTestUnderMask() local
2536 (NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, in adjustForTestUnderMask()
2547 (NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, in adjustForTestUnderMask()
2554 NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, MaskVal, CmpVal, in adjustForTestUnderMask()
3870 int64_t BitSize = (int64_t)1 << Log2_32_Ceil(NumSignificantBits); in lowerCTPOP() local
3871 BitSize = std::min(BitSize, OrigBitSize); in lowerCTPOP()
3880 for (int64_t I = BitSize / 2; I >= 8; I = I / 2) { in lowerCTPOP()
3882 if (BitSize != OrigBitSize) in lowerCTPOP()
3884 DAG.getConstant(((uint64_t)1 << BitSize) - 1, DL, VT)); in lowerCTPOP()
3889 if (BitSize > 8) in lowerCTPOP()
3891 DAG.getConstant(BitSize - 8, DL, VT)); in lowerCTPOP()
3954 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_LOAD_OP() local
3991 DAG.getConstant(32 - BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
3995 DAG.getConstant(uint32_t(-1) >> BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
4000 DAG.getConstant(BitSize, DL, WideVT) }; in lowerATOMIC_LOAD_OP()
4007 DAG.getConstant(BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
4082 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_CMP_SWAP() local
4103 NegBitShift, DAG.getConstant(BitSize, DL, WideVT) }; in lowerATOMIC_CMP_SWAP()
7379 unsigned BitSize, bool Invert) const { in emitAtomicLoadBinary() argument
7384 bool IsSubWord = (BitSize < 32); in emitAtomicLoadBinary()
7396 BitSize = MI.getOperand(6).getImm(); in emitAtomicLoadBinary()
7399 const TargetRegisterClass *RC = (BitSize <= 32 ? in emitAtomicLoadBinary()
7402 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG; in emitAtomicLoadBinary()
7403 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG; in emitAtomicLoadBinary()
7450 if (BitSize <= 32) in emitAtomicLoadBinary()
7453 .addReg(Tmp).addImm(-1U << (32 - BitSize)); in emitAtomicLoadBinary()
7472 .addImm(32).addImm(31 + BitSize).addImm(32 - BitSize); in emitAtomicLoadBinary()
7498 unsigned KeepOldMask, unsigned BitSize) const { in emitAtomicLoadMinMax()
7503 bool IsSubWord = (BitSize < 32); in emitAtomicLoadMinMax()
7514 BitSize = MI.getOperand(6).getImm(); in emitAtomicLoadMinMax()
7517 const TargetRegisterClass *RC = (BitSize <= 32 ? in emitAtomicLoadMinMax()
7520 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG; in emitAtomicLoadMinMax()
7521 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG; in emitAtomicLoadMinMax()
7577 .addImm(32).addImm(31 + BitSize).addImm(0); in emitAtomicLoadMinMax()
7626 int64_t BitSize = MI.getOperand(7).getImm(); in emitAtomicCmpSwapW() local
7634 unsigned ZExtOpcode = BitSize == 8 ? SystemZ::LLCR : SystemZ::LLHR; in emitAtomicCmpSwapW()
7684 .addReg(OldVal).addReg(BitShift).addImm(BitSize); in emitAtomicCmpSwapW()
7686 .addReg(SwapVal).addReg(OldValRot).addImm(32).addImm(63 - BitSize).addImm(0); in emitAtomicCmpSwapW()
7705 .addReg(RetrySwapVal).addReg(NegBitShift).addImm(-BitSize); in emitAtomicCmpSwapW()